參數(shù)資料
型號: MPC5200VR400BR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA272
封裝: 27 X 27 MM, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, BGA-272
文件頁數(shù): 13/72頁
文件大?。?/td> 978K
代理商: MPC5200VR400BR2
MPC5200B Data Sheet, Rev. 4
20
Freescale Semiconductor
Figure 7. Timing Diagram—DDR SDRAM Memory Read Timing
MEM_CLK
Control Signals
MDQ (Data)
MA (Address)
MEM_CLK
MDQS (Data Strobe)
NOTE: Control Signals signals are composed of RAS, CAS, MEM_WE, MEM_CS, MEM_CS1 and CLK_EN
Active
NOP
READ
NOP
thold
Row
Column
MBA (Bank Selects)
tvalid
thold
tvalid
thold
tvalid
tdata_valid_min
tdata_valid_max
Read Data
tdata_sample_min
tdata_sample_max
Sample Window
MDQ (Data)
MDQS (Data Strobe)
tdata_valid_min
tdata_valid_max
Read Data
tdata_sample_min
tdata_sample_max
Sample Window
Sample position A: data are sampled on the expected edge of MEM_CLK, the MDQS signal indicate the valid data
Sample
position
A
Sample
position
B
Sample position B: data are sampled on a later edge of MEM_CLK, SDRAM controller is waiting for the valid MDQS signal
0.5 × tMEM_CLK
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