參數(shù)資料
型號: MPC5200VR400BR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA272
封裝: 27 X 27 MM, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, BGA-272
文件頁數(shù): 38/72頁
文件大?。?/td> 978K
代理商: MPC5200VR400BR2
MPC5200B Data Sheet, Rev. 4
Freescale Semiconductor
43
Figure 33. Timing Diagram — SPI Slave Mode, Format 0 (CPHA = 0)
NOTE
Output timing is specified at a nominal 50 pF load.
Table 38. Timing Specifications — SPI Master Mode, Format 1 (CPHA = 1)
Sym
Description
Min
Max
Units
SpecID
1
Cycle time
4
1024
IP-Bus Cycle(1)
1 Inter Peripheral Clock is defined in the MPC5200B User’s Manual (MPC5200BUM).
A11.21
2
Clock high or low time
2
512
IP-Bus Cycle(1)
A11.22
3
Slave select to clock delay
15.0
ns
A11.23
4
Output data valid
20.0
ns
A11.24
5
Input Data setup time
20.0
ns
A11.25
6
Input Data hold time
20.0
ns
A11.26
7
Slave disable lag time
15.0
ns
A11.27
8
Sequential Transfer delay
1
IP-Bus Cycle(1)
A11.28
9
Clock falling time
7.9
ns
A11.29
10
Clock rising time
7.9
ns
A11.30
SCK
(CLKPOL=0)
SCK
(CLKPOL=1)
MOSI
Input
SS
Input
MISO
Output
1
22
9
3
7
4
6
5
8
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