參數(shù)資料
型號: MCIMX514AJM6C
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA529
封裝: 19 X 19 MM, 0.8 MM PITCH, ROHS COMPLIANT, BGA-529
文件頁數(shù): 46/172頁
文件大?。?/td> 2218K
代理商: MCIMX514AJM6C
i.MX51A Automotive and Infotainment Applications Processors, Rev. 4
14
Freescale Semiconductor
IOMUX Configuration for Boot Media
3.1
NAND
The NAND Flash Controller (NFC) signals are not configured in the IOMUX. The NFC interface uses
dedicated contacts on the IC.
3.2
SD/MMC IOMUX Pin Configuration
Table 5 shows the SD/MMC IOMUX pin configuration.
Only DAT0 is available when the SD/MMC is used for boot. The remaining lines (DAT1–DAT7) are not
available.
3.3
I2C IOMUX Pin Configuration
The contacts assigned to the signals used by the three I2C modules is shown in Table 6.
Table 5. SD/MMC IOMUX Pin Configuration
Signal
eSDHC1
eSDHC2
eSDHC3
eSDHC4
CLK
SD1_CLK.alt0
SD2_CLK.alt0
NANDF_RDY_INT.alt5
NANDF_CS2.alt5
CMD
SD1_CMD.alt0
SD2_CMD.alt0
NANDF_CS7.alt5
NANDF_RB1.alt5
DAT0
SD1_DATA0.alt0
SD2_DATA0.alt0
NANDF_WE_B.alt2
NANDF_CS3.alt5
DAT1
N/A1
1 N/A in the ROM code indicates the pins are not available.
N/A
DAT2
N/A
CD/DAT3
SD1_DATA3.alt0
SD2_DATA3.alt0
NANDF_RB0.alt5
NANDF_CS6.alt5
DAT4
N/A
DAT5
N/A
DAT6
N/A
DAT7
N/A
Table 6. I2C IOMUX Pin Configuration
Signal
HSI2CI2C1
I2C2
SDA
I2C1_DAT.alt0
GPIO1_3.alt2
SCL
I2C1_CLK.alt0
GPIO1_2.alt2
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相關代理商/技術參數(shù)
參數(shù)描述
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