參數(shù)資料
型號(hào): MCIMX514AJM6C
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA529
封裝: 19 X 19 MM, 0.8 MM PITCH, ROHS COMPLIANT, BGA-529
文件頁數(shù): 38/172頁
文件大?。?/td> 2218K
代理商: MCIMX514AJM6C
i.MX51A Automotive and Infotainment Applications Processors, Rev. 4
132
Freescale Semiconductor
Electrical Characteristics
NOTE
All the timings for the SSI are given for a non-inverted serial clock
polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have
been inverted, all the timing remains valid by inverting the clock signal
STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables
and in the figures.
All timings are on Audiomux Pads when SSI is being used for data
transfer.
“Tx” and “Rx” refer to the Transmit and Receive sections of the SSI.
The terms WL and BL refer to Word Length (WL) and Bit Length (BL).
For internal Frame Sync operation using external clock, the FS timing is
same as that of Tx Data (for example, during AC97 mode of operation).
Oversampling Clock Operation
SS47
Oversampling clock period
15.04
ns
SS48
Oversampling clock high period
6.0
ns
SS49
Oversampling clock rise time
3.0
ns
SS50
Oversampling clock low period
6.0
ns
SS51
Oversampling clock fall time
3.0
ns
Table 103. SSI Receiver Timing with Internal Clock (continued)
ID
Parameter
Min
Max
Unit
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