參數(shù)資料
型號: MCIMX27
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Multimedia Applications Processor(多媒體應用處理器)
中文描述: 多媒體應用處理器(多媒體應用處理器)
文件頁數(shù): 60/118頁
文件大小: 1159K
代理商: MCIMX27
i.MX27 Data Sheet, Advance Information, Rev. 0.1
60
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Signal Descriptions
Figure 21. I
2
C Bus Timing Diagram
3.5.10
JTAG Controller (JTAGC)
This section details the electrical characteristics for the JTAGC module.
Figure 22
shows the JTAGC test
clock input timing,
Figure 23
shows the JTAGC test access port,
Figure 24
shows the JTAGC TRST
timing, and
Table 29
lists the JTAGC timing parameters.
Figure 22. Test Clock Input Timing Diagram
Table 28. I2C Module Timing Parameters
ID
Parameter
1.8 V +/–0.10 V
3.0 V +/–0.30 V
Unit
Min
Max
Min
Max
SCL Clock Frequency
0
100
0
100
kHz
IC1
Hold time (repeated) START Condition
114.8
111.1
ns
IC2
Data Hold Time
0
69.7
0
72.3
ns
IC3
Data Setup Time
3.1
1.76
ns
IC4
HIGH period of the SCL clock
69.7
68.3
ns
IC5
LOW period of the SCL clock
336.4
335.1
ns
IC6
Setup Time for STOP condition
110.5
111.1
ns
IC1
IC6
SDA
SCL
IC3
IC2
IC5
IC4
Tck
(input)
J1
J2
J2
J3
J3
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相關代理商/技術參數(shù)
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