Functional Description and Application Information
i.MX27 Data Sheet, Advance Information, Rev. 0.1
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
5
A primary AHB MUX (PAHBMUX) module performs address decoding, read data muxing, bus
watchdog, and other miscellaneous functions for the primary AHB within the platform. A clock control
module (CLKCTL) is provided to support a power-conscious design methodology, as well as
implementation of several clock synchronization circuits.
2.1.1
Memory System
The ARM926EJ-S complex includes 16-Kbyte Instruction and 16-Kbyte Data caches. The embedded
45-Kbyte SRAM (VRAM) can be used to avoid external memory accesses or it can be used for
applications. There is also a 24-Kbyte ROM for bootstrap code.
2.2
Module Inventory
Table 2
shows an alphabetical listing of the modules in the i.MX27 multimedia applications processor. A
cross-reference to each module’s section and page number goes directly to a more detailed module
description for additional information.
Table 2. Digital and Analog Modules
Block Mnemonic
Block Name
Functional
Grouping
Brief Description
Section/
Page
1-Wire
1-Wire Interface
Connectivity
Peripheral
The 1-Wire module provides bi-directional communication
between the ARM926EJ-S and the Add-Only-Memory EPROM
(DS2502). The 1-Kbit EPROM is used to hold information
about battery and communicates with the ARM926 Platform
using the IP interface.
2.3.1/9
AIPI
AHB-Lite IP
Interface
Module
Bus Control
The AIPI acts as an interface between the ARM Advanced
High-performance Bus Lite. (AHB-Lite) and lower bandwidth
peripherals that conforms to the IP Bus specification, Rev 2.0.
2.3.2/9
AITC
ARM9EJ-S
Interrupt
Controller
Bus Control
AITC is connected to the primary AHB as a slave device. It
generates the normal and fast interrupts to the ARM926EJ-S
processor.
2.3.3/10
ARM926EJS
ARM926EJ-S
CPU
The ARM926EJ-S (ARM926) is a member of the ARM9 family
of general-purpose microprocessors targeted at multi-tasking
applications.
2.3.4/10
ATA
Advanced
Technology(AT)
Attachment
Connectivity
Peripheral
The ATA block is an AT attachment host interface. It interfaces
with IDE hard disc drives and ATAPI optical disc drives.
2.3.5/10
AUDMUX
Digital Audio
Multiplexer
Multimedia
Peripheral
The AUDMUX interconnections allow multiple, simultaneous
audio/voice/data flows between the ports in point-to-point or
point-to-multipoint configurations.
2.3.6/11
CRM
Clock and
Reset Module
Clock and
Reset Control
The CRM generates clock and reset signals used throughout
the i.MX27 processor and also for external peripherals.
2.3.7/12
CSI
CMOS Sensor
Interface
Multimedia
Interface
The CSI is a logic interface which enables the i.MX27
processor to connect directly to external CMOS sensors and a
CCIR656 video source.
2.3.8/12