參數(shù)資料
型號: MCIMX27
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Multimedia Applications Processor(多媒體應用處理器)
中文描述: 多媒體應用處理器(多媒體應用處理器)
文件頁數(shù): 59/118頁
文件大?。?/td> 1159K
代理商: MCIMX27
Signal Descriptions
i.MX27 Data Sheet, Advance Information, Rev. 0.1
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
59
Figure 20. MII Serial Management Channel Timing Diagram
3.5.9
Inter IC Communication (I
2
C)
This section describes the electrical information of the I2C module.
3.5.9.1
I
2
C Module Timing
The I2C communication protocol consists of seven elements: START, Data Source/Recipient, Data
Direction, Slave Acknowledge, Data, Data Acknowledge, and STOP.
Figure 21
shows the timing of I
2
C
module.
Table 28
lists the I2C module timing parameters.
Table 27. MII Serial Management Channel Timing Parameters
ID
Parameter
Min
Max
Unit
M10
FEC_MDC falling edge to FEC_MDIO output invalid (minimum propagation delay)
0
ns
M11
FEC_MDC falling edge to FEC_MDIO output valid (max propagation delay)
5
ns
M12
FEC_MDIO (input) to FEC_MDC rising edge setup
18
ns
M13
FEC_MDIO (input) to FEC_MDC rising edge hold
0
ns
M14
FEC_MDC pulse width high
40% 60%
FEC_MDC period
M15
FEC_MDC pulse width low
40% 60%
FEC_MDC period
FEC_MDC (output)
FEC_MDIO (output)
M14
M15
M10
M11
M12
M13
FEC_MDIO (input)
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相關代理商/技術(shù)參數(shù)
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