Signal Descriptions
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
19-17
M4
INT1/
USB_WOR
——
—
INT1/ USB_WOR
Interrupt input 1/USB
wake-on-ring
I
M5
QSPI_CS0/
BUSW0
—
QSPI_CS0 / BUSW0
QSPI peripheral chip
select 0/CS0 bus width bit
0
O
M6
PB7
TOUT0
—
PB7/TOUT0
Port B bit 7/Timer 0
output compare
I/O
M7
E_RxDV
—
E_RxDV
Ethernet Rx data valid
I
M8
PB9
E_TxD2
—
PB9/E_TxD2
Port B bit 9/Tx data bit 2
(100 Base-T Ethernet
only)
I/O
M9
PB13
E_RxD1
—
PB13/E_RxD1
Port B bit 13/Rx data bit 1
(100 Base-T Ethernet
only)
I/O
M10
E_TxER
—
E_TxER
Transmit error (100
base-T Ethernet only)
O
M11
CS4
—
CS4
Chip select 4
O
M12
RSTI
—
RSTI
Device reset
I
M13
BYPASS
—
BYPASS
Bypass internal test
mode
O
M14
CLKIN
—
CLKIN
CPU external clock input
I
N1
DOUT1
—
DOUT1
PLIC ports 1, 2, 3 data
output
O
N2
DIN1
—
DIN1
PLIC ports 1, 2, 3 data
input
I
N3
INT3
—
INT3
Interrupt input 3
I
N4
QSPI_Dout/
WSEL
—
QSPI_Dout / WSEL
QSPI data output/Bus
width selection
I/O
N5
PWM_OUT0
—
PWM_OUT0
PWM output compare 0
O
N6
E_TxD0
—
E_TxD0
Ethernet Tx data
O
N7
E_RxCLK
—
E_RxCLK
Ethernet Rx clock
I
N8
PB8
E_TxD3
—
PB8/E_TxD3
Port B bit 8/Tx data bit 3
(100 Base-T Ethernet
only)
I/O
N9
PB12
E_RxD2
—
PB12/E_RxD2
Port B bit 12/Rx data bit 2
(100 Base-T Ethernet
only)
I/O
N10
E_MDIO
—
E_MDIO
Management channel
serial data (100 base-T
only)
I/O
Table 19-2. Signal Name and Description by Pin Number (Sheet 7 of 8)
Map
BGA
Pin
Pin Functions
Name
Description
I/O
0 (Reset)
1
2
3