General Purpose I/O Module
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
17-5
17.2.2
Port B Control Register (PBCNT)
PBCNT, shown in
Figure 17-2, is used to configure the pins assigned to signals that are multiplexed with
GPIO port B.
Table 17-4. Port A Control Register Function Bits
Pin Number
PACNT[xx] = 00
(Function 0b00)
PACNT[xx] = 01
(Function 0b01)
PACNT[xx] = 10
(Function 0b10)
PACNT[xx] = 11
(Function 0b11)
D2
PA0
USB_TP
—
D1
PA1
USB_RP
—
E5
PA2
USB_RN
—
E4
PA3
USB_TN
—
E3
PA4
USB_Susp
—
E2
PA5
USB_TxEN
—
E1
PA6
USB_RxD
—
P1
PA7
QSPI_CS3
DOUT3
—
J2
PA8
FSC0/FSR0
—
J3
PA9
DGNT0
—
K5
PA10
DREQ0
—
L1
PA11
Reserved
QSPI_CS1
—
L2
PA12
DFSC2
—
L3
PA13
DFSC3
—
M2
PA14
DREQ1
—
M3
PA15
DGNT11
1 If this pin is programmed to function as INT6, it is not available as a GPIO.
——
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Field
PBCNT15
PBCNT14
PBCNT13
PBCNT12
PBCNT11
PBCNT10
PBCNT9
PBCNT8
Reset
0000_0000_0000_0000
R/W
Read/Write
15
14
13
12
11
10
98
76
54
32
10
Field
PBCNT7
PBCNT6
PBCNT5
PBCNT4
PBCNT3
PBCNT2
PBCNT1
PBCNT0
Reset
0000_0000_0000_0000
R/W
Read/Write
Addr
MBAR + 0x0088
Figure 17-2. Port B Control Register (PBCNT)