參數(shù)資料
型號： MC68HC912BL16FU8
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64
封裝： QFP-64
文件頁數(shù)： 96/128頁
文件大小： 532K
代理商： MC68HC912BL16FU8
MC68HC912BL16
MOTOROLA
MC68HC912BL16TS/D
7
2.2 Data Types
The CPU12 supports the following data types:
Bit data
8-bit and 16-bit signed and unsigned integers
16-bit unsigned fractions
16-bit addresses
A byte is eight bits wide and can be accessed at any byte location. A word is composed of two consec-
utive bytes with the most significant byte at the lower value address. There are no special requirements
for alignment of instructions or operands.
2.3 Addressing Modes
Addressing modes determine how the CPU accesses memory locations to be operated upon. The
CPU12 includes all of the addressing modes of the M68HC11 CPU as well as several new forms of in-
dexed addressing. Table 2 is a summary of the available addressing modes.
Table 2 M68HC12 Addressing Mode Summary
Addressing Mode
Source Format
Abbreviation
Description
Inherent
INST
(no externally supplied
operands)
INH
Operands (if any) are in CPU registers
Immediate
INST #opr8i
or
INST #opr16i
IMM
Operand is included in instruction stream
8- or 16-bit size implied by context
Direct
INST opr8a
DIR
Operand is the lower 8-bits of an address in the
range $0000 – $00FF
Extended
INST opr16a
EXT
Operand is a 16-bit address
Relative
INST rel8
or
INST rel16
REL
An 8-bit or 16-bit relative offset from the current
pc is supplied in the instruction
Indexed
(5-bit offset)
INST oprx5,xysp
IDX
5-bit signed constant offset from x, y, sp, or pc
Indexed
(auto pre-decrement)
INST oprx3,–xys
IDX
Auto pre-decrement x, y, or sp by 1 ~ 8
Indexed
(auto pre-increment)
INST oprx3,+xys
IDX
Auto pre-increment x, y, or sp by 1 ~ 8
Indexed
(auto post-
decrement)
INST oprx3,xys–
IDX
Auto post-decrement x, y, or sp by 1 ~ 8
Indexed
(auto post-increment)
INST oprx3,xys+
IDX
Auto post-increment x, y, or sp by 1 ~ 8
Indexed
(accumulator offset)
INST abd,xysp
IDX
Indexed with 8-bit (A or B) or 16-bit (D) accumu-
lator offset from x, y, sp, or pc
Indexed
(9-bit offset)
INST oprx9,xysp
IDX1
9-bit signed constant offset from x, y, sp, or pc
(lower 8-bits of offset in one extension byte)
Indexed
(16-bit offset)
INST oprx16,xysp
IDX2
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Indexed-Indirect
(16-bit offset)
INST [oprx16,xysp]
[IDX2]
Pointer to operand is found at...
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Indexed-Indirect
(D accumulator
offset)
INST [D,xysp]
[D,IDX]
Pointer to operand is found at...
x, y, sp, or pc plus the value in D
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