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| 型號(hào)： | MC68HC912BL16FU8 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | QFP-64 |
| 文件頁(yè)數(shù)： | 36/128頁(yè) |
| 文件大小： | 532K |
| 代理商： | MC68HC912BL16FU8 |
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MC68HC912BL16
MOTOROLA
MC68HC912BL16TS/D
15
3.4 Port Signals
The MC68HC912BL16 incorporates eight ports which are used to control and access the various device
subsystems. When not used for these purposes, port pins may be used for general-purpose I/O. In ad-
dition to the pins described below, each port consists of a data register which can be read and written
at any time, and, with the exception of port AD and PE[1:0], a data direction register which controls the
direction of each pin. After reset all port pins are configured as input.
3.4.1 Port A
Port A pins are used for address and data in expanded modes. The port data register is not in the ad-
dress map during expanded and peripheral mode operation. When it is in the map, port A can be read
or written at anytime.
Register DDRA determines whether each port A pin is an input or output. DDRA is not in the address
map during expanded and peripheral mode operation. Setting a bit in DDRA makes the corresponding
bit in port A an output; clearing a bit in DDRA makes the corresponding bit in port A an input. The default
reset state of DDRA is all zeros.
When the PUPA bit in the PUCR register is set, all port A input pins are pulled up internally by an active
pull-up device. This bit has no effect if the port is being used in expanded modes as the pull-ups are
inactive.
Setting the RDPA bit in register RDRIV causes all port A outputs to have reduced drive level. RDRIV
can be written once after reset. RDRIV is not in the address map in peripheral mode. Refer to 6 Bus
Control and Input/Output.
3.4.2 Port B
Port B pins are used for address and data in expanded modes. The port data register is not in the ad-
dress map during expanded and peripheral mode operation. When it is in the map, port B can be read
or written at anytime.
Register DDRB determines whether each port B pin is an input or output. DDRB is not in the address
map during expanded and peripheral mode operation. Setting a bit in DDRB makes the corresponding
bit in port B an output; clearing a bit in DDRB makes the corresponding bit in port B an input. The default
reset state of DDRB is all zeros.
When the PUPB bit in the PUCR register is set, all port B input pins are pulled up internally by an active
pull-up device. This bit has no effect if the port is being used in expanded modes as the pull-ups are
inactive.
Setting the RDPB bit in register RDRIV causes all port B outputs to have reduced drive level. RDRIV
can be written once after reset. RDRIV is not in the address map in peripheral mode. Refer to 6 Bus
Control and Input/Output.
3.4.3 Port E
Port E pins operate differently from port A and B pins. Port E pins are used for bus control signals and
interrupt service request signals. When a pin is not used for one of these specific functions, it can be
used as general-purpose I/O. However, two of the pins (PE[1:0]) can only be used for input, and the
states of these pins can be read in the port data register even when they are used for IRQ and XIRQ.
The PEAR register determines pin function, and register DDRE determines whether each pin is an input
or output when it is used for general-purpose I/O. PEAR settings override DDRE settings. Because
PE[1:0] are input-only pins, only DDRE[7:2] have effect. Setting a bit in the DDRE register makes the
corresponding bit in port E an output; clearing a bit in the DDRE register makes the corresponding bit
in port E an input. The default reset state of DDRE is all zeros.
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