參數(shù)資料
型號： MC56F8323MFB60
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 0-BIT, 120 MHz, OTHER DSP, PQFP64
封裝： PLASTIC, LQFP-64
文件頁數(shù)： 117/140頁
文件大?。?/td> 741K
代理商： MC56F8323MFB60
56F8323 Technical Data, Rev. 17
78
Freescale Semiconductor
Preliminary
5.6.16
Fast Interrupt 1 Vector Address Low Register (FIVAL1)
Figure 5-18 Fast Interrupt 1 Vector Address Low Register (FIVAL1)
5.6.16.1
Fast Interrupt 1 Vector Address Low (FIVAL1)—Bits 15–0
The lower 16 bits of the vector address used for Fast Interrupt 1. This register is combined with FIVAH1
to form the 21-bit vector address for Fast Interrupt 1 defined in the FIM1 register.
5.6.17
Fast Interrupt 1 Vector Address High Register (FIVAH1)
Figure 5-19 Fast Interrupt 1 Vector Address High Register (FIVAH1)
5.6.17.1
Reserved—Bits 15–5
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.17.2
Fast Interrupt 1 Vector Address High (FIVAH1)—Bits 4–0
The upper five bits of the vector address are used for Fast Interrupt 1. This register is combined with
FIVAL1 to form the 21-bit vector address for Fast Interrupt 1 defined in the FIM1 register.
5.6.18
IRQ Pending 0 Register (IRQP0)
Figure 5-20 IRQ Pending 0 Register (IRQP0)
5.6.18.1
IRQ Pending (PENDING)—Bits 16–2
This register combines with the other five to represent the pending IRQs for interrupt vector numbers 2
through 81.
0 = IRQ pending for this vector number
1 = No IRQ pending for this vector number
Base + $F
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
FAST INTERRUPT 1
VECTOR ADDRESS LOW
Write
RESET
00000
0000000
0000
Base + $10
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
FAST INTERRUPT 1
VECTOR ADDRESS HIGH
Write
RESET
00000
0000000
0000
Base + $11
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
PENDING [16:2]
1
Write
RESET
11111
1111111
1111
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