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| 型號(hào)： | MC16S2CPU20B1 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 20.97 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 74/104頁 |
| 文件大小： | 812K |
| 代理商： | MC16S2CPU20B1 |
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MC68HC16S2
MOTOROLA
MC68HC16S2TS/D
71
5 Standby RAM Module
The standby RAM module (SRAM) provides two Kbytes of fast RAM that is especially useful for system
stacks and variable storage. The SRAM has a dedicated power supply pin so that memory content can
be preserved when the MCU is powered down.
5.1 Overview
The SRAM module consists of a control register block that is located at a fixed range of addresses in
MCU address space, and a 2-Kbyte array of two bus cycle static RAM that can be mapped to any 2-
Kbyte boundary in MCU address space. SRAM control registers are located at addresses $YFFB00–
YFFB08.
The module responds to program and data space accesses. Data can be read or written in bytes, words,
or long words. The RAM array must not be mapped so that array addresses overlap module control reg-
ister addresses, as overlap makes the registers inaccessible.
The SRAM is powered by VDD in normal operation. During power-down, SRAM contents are maintained
by power from the VSTBY input. Power switching between sources is automatic.
Table 36 shows the SRAM address map.
5.2 SRAM Register Block
There are four SRAM control registers: the SRAM module configuration register (RAMMCR), the SRAM
test register (RAMTST), and the SRAM array base address registers (RAMBAH/RAMBAL).
5.3 SRAM Registers
SRAM responds to both program and data space accesses based on the value in the RASP field in
RAMMCR. This allows code to be executed from RAM.
Use RAMMCR to determine whether the RAM is in STOP mode or normal mode. RAMMCR can deter-
mine in which space the array resides and also controls access to the base array registers. Reads of
unimplemented bits always return zeros. Writes do not affect unimplemented bits.
NOTES:
1. Y = M111, where M is the logic state of the module mapping (MM) bit in SIMCR.
Table 36 SRAM Address Map
Address
15
0
$YFFB001
RAM Module Configuration Register (RAMMCR)
$YFFB02
RAM Test Register (RAMTST)
$YFFB04
RAM Array Base Address Register High (RAMBAH)
$YFFB06
RAM Array Base Address Register Low (RAMBAL)
RAMMCR — RAM Module Configuration Register
$YFFB00
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
STOP
0
RLCK
0
RASP[1:0]
NOT USED
RESET:
1
0
1
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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