參數(shù)資料
型號(hào)： MC16S2CPU20B1
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, 20.97 MHz, MICROCONTROLLER, PQFP100
封裝： TQFP-100
文件頁(yè)數(shù)： 33/104頁(yè)
文件大?。?/td> 812K
代理商： MC16S2CPU20B1
MOTOROLA
MC68HC16S2
34
MC68HC16S2TS/D
3.6.4 Option Registers
The option registers contain eight fields that determine timing of and conditions for assertion of chip-
select signals. To assert a chip-select signal, and to provide DSACK or autovector support, other con-
straints set by fields in the option register and in the base address register must also be satisfied.
CSORBT, the option register for CSBOOT, contains special reset values that support bootstrap opera-
tion from peripheral memory devices.
The following bit descriptions apply to both CSORBT and CSOR[0:10] option registers.
MODE — Asynchronous/Synchronous Mode
0 = Asynchronous mode (chip-select assertion determined by bus control signals)
1 = Synchronous mode (chip-select assertion synchronized with ECLK signal)
In asynchronous mode, the chip-select is asserted synchronized with AS or DS.
DSACK[3:0] is not used in synchronous mode because a bus cycle is only performed as a synchronous
operation. When a match condition occurs on a chip-select programmed for synchronous operation, the
chip-select signals the EBI that an ECLK cycle is pending.
BYTE[1:0] — Upper/Lower Byte Option
This field is used only when the chip-select 16-bit port option is selected in the pin assignment register.
Table 24 lists upper/lower byte options.
R/W[1:0] — Read/Write
This field causes a chip-select to be asserted only for reads, only for writes, or for both reads and writes.
Refer to Table 25 for options available.
CSORBT — Chip-Select Option Register Boot ROM
$YFFA4A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
MODE
BYTE[1:0]
R/W[1:0]
STRB
DSACK[3:0]
SPACE[1:0]
IPL[2:0]
AVEC
RESET:
0
1
0
1
0
1
0
CSOR[0:10] — Chip-Select Option Registers
$YFFA4E–YFFA76
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
MODE
BYTE[1:0]
R/W[1:0]
STRB
DSACK[3:0]
SPACE[1:0]
IPL[2:0]
AVEC
RESET:
0
Table 24 Upper/Lower Byte Options
BYTE[1:0]
Description
00
Disable
01
Lower byte
10
Upper byte
11
Both bytes
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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