參數(shù)資料
型號: MC16S2CPU20B1
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, 20.97 MHz, MICROCONTROLLER, PQFP100
封裝: TQFP-100
文件頁數(shù): 70/104頁
文件大小: 812K
代理商: MC16S2CPU20B1
MOTOROLA
MC68HC16S2
68
MC68HC16S2TS/D
4.7 Exceptions
An exception is an event that preempts normal instruction process. Exception processing makes the
transition from normal instruction execution to execution of a routine that deals with an exception.
Each exception has an assigned vector that points to an associated handler routine. Exception process-
ing includes all operations required to transfer control to a handler routine, but does not include execu-
tion of the handler routine itself. Keep the distinction between exception processing and execution of an
exception handler in mind while reading this section.
4.7.1 Exception Vectors
An exception vector is the address of a routine that handles an exception. Exception vectors are con-
tained in a data structure called the exception vector table, which is located in the first 512 bytes of bank
0. Refer to Table 35 for the exception vector table.
All vectors except the reset vector consist of one word and reside in data space. The reset vector
consists of four words that reside in program space. There are 52 predefined or reserved vectors, and
200 user-defined vectors.
Each vector is assigned an 8-bit number. Vector numbers for some exceptions are generated by exter-
nal devices; others are supplied by the processor. There is a direct mapping of vector number to vector
table address. The processor left shifts the vector number one place (multiplies by two) to convert it to
an address.
Table 35 Exception Vector Table
Vector
Number
Vector
Address
Space
Type of
Exception
0
0000
P
Reset — initial ZK, SK, and PK
0002
P
Reset — initial PC
0004
P
Reset — initial SP
0006
P
Reset — initial IZ (direct page)
4
0008
D
Breakpoint
5
000A
D
Bus error
6
000C
D
Software interrupt
7
000E
D
Illegal instruction
8
0010
D
Division by zero
9 – E
0012 – 001C
D
Unassigned, reserved
F
001E
D
Uninitialized interrupt
10
0020
D
Unassigned, reserved
11
0022
D
Level 1 interrupt autovector
12
0024
D
Level 2 interrupt autovector
13
0026
D
Level 3 interrupt autovector
14
0028
D
Level 4 interrupt autovector
15
002A
D
Level 5 interrupt autovector
16
002C
D
Level 6 interrupt autovector
17
002E
D
Level 7 interrupt autovector
18
0030
D
Spurious interrupt
19 – 37
0032 – 006E
D
Unassigned, reserved
38 – FF
0070 – 01FE
D
User-defined interrupts
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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