參數(shù)資料
型號: MC13214R2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, BGA71
封裝: 9 X 9 MM, 1 MM HEIGHT, ROHS COMPLIANT, LGA-71
文件頁數(shù): 64/70頁
文件大?。?/td> 802K
代理商: MC13214R2
MC13211/212/213/214 Technical Data, Rev. 0.0,
Freescale Semiconductor
67
better performance due to the reduced loss of the external T/R switch and the more optimum match
provided to the PAO and RFIN ports.
The switch control is connected to the CT_Bias pin which serves as its control signal. The CT_Bias signal
can be programmed to be active high or active low (depending on TX versus RX) and will switch
appropriately based on the radio operation. No interaction with the MCU on an operation-by-operation
basis is required.
NOTE
Passive component values can vary as a function of circuit board layout as
required to obtain best matching and RF performance.
The VDD voltage to the antenna switch is connected to GPIO1. This is a useful feature when GPIO1 is
programmed as an “Out of Idle” status indicator. When the radio is out of Idle (or active), the antenna
switch is powered. In this manner, the antenna switch only consumes current when it needs to be active.
The GPIO1 can only be used as a VDD source for a very low current load.
Figure 36. RF Dual Port Application with an F-Antenna
5
1
6
2
3
4
Z2
LDB212G4005C-001
L5
4.7nH
L6
4.7nH
C6
10pF
VDDA
VDD
6
IN
5
VCONT
4
OUT1
1
OUT2
3
GND
2
IC1
PG2012TK-E2
C3
10pF
C8
10pF
5
1
6
2
3
4
Z3
LDB212G4005C-001
L8
2.2nH
C9
1.8pF
R3
0R
R4
0R
Not Mounted
1
2
5
3
4
J2
SMA_edge_Receptacle_Female
ANT2
F_Antenna
L7
3.3nH
L9
3.3nH
C5
10pF
C4
1.0pF
C7
1.8pF
GPIO1
44
PAO_M
39
PAO_P
38
RFIN_P
36
RFIN_M
35
CT_Bias
34
U2
MC1321x
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