參數(shù)資料
型號(hào)： MC13214R2
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, BGA71
封裝： 9 X 9 MM, 1 MM HEIGHT, ROHS COMPLIANT, LGA-71
文件頁(yè)數(shù)： 40/70頁(yè)
文件大?。?/td> 802K
代理商： MC13214R2
MC13211/212/213/214 Technical Data, Rev. 0.0,
Freescale Semiconductor
45
5.7.8
Development Support
Development support systems in the include the background debug controller (BDC) and the on-chip
debug module (DBG). The BDC provides a single-wire debug interface to the target MCU that provides a
convenient interface for programming the on-chip FLASH and other non-volatile memories. The BDC is
also the primary debug interface for development and allows non-intrusive access to memory data and
traditional debug features such as CPU register modify, breakpoints, and single instruction trace
commands.
Address and data bus signals are not available on external pins (not even in test modes). Debug is done
through commands fed into the MCU via the single-wire background debug interface. The debug module
provides a means to selectively trigger and capture bus information so an external development system can
reconstruct what happened inside the MCU on a cycle-by-cycle basis without having external access to the
address and data signals.
The alternate BDC clock source for HCS08 is the ICGLCLK.
5.7.8.1
Development Support Features
Features of the background debug controller (BDC) include:
Single pin for mode selection and background communications
BDC registers are not located in the memory map
SYNC command to determine target communications rate
Non-intrusive commands for memory access
Active background mode commands for CPU register access
GO and TRACE1 commands
BACKGROUND command can wake CPU from stop or wait modes
One hardware address breakpoint built into BDC
Oscillator runs in stop mode, if BDC enabled
COP watchdog disabled while in active background mode
Features of the debug module (DBG) include:
Two trigger comparators:
— Two address + read/write (R/W) or
— One full address + data + R/W
Flexible 8-word by 16-bit FIFO (first-in, first-out) buffer for capture information:
— Change-of-flow addresses or
— Event-only data
Two types of breakpoints:
— Tag breakpoints for instruction opcodes
— Force breakpoints for any address access
Nine trigger modes:
相關(guān)PDF資料
PDF描述
MC13224VR2 SPECIALTY MICROPROCESSOR CIRCUIT, PBGA99
MC13226V SPECIALTY MICROPROCESSOR CIRCUIT, PBGA99
MC13226VR2 SPECIALTY MICROPROCESSOR CIRCUIT, PBGA99
MC13224V SPECIALTY MICROPROCESSOR CIRCUIT, PBGA99
MC141556P1 UNIVERSAL SERIAL BUS CONTROLLER, PDIP28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC1321X 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:
MC1321X_09 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ZigBee?- Compliant Platform - 2.4 GHz Low Power Transceiver for the IEEE? 802.15.4 Standard plus Microcontroller
MC13224V 功能描述:射頻收發(fā)器 PIP 802.15.4 2.4G IND RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray
MC13224V 制造商:Freescale Semiconductor 功能描述:; Controller Family/Series:(ARM7); Memor
MC13224V_09 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Advanced ZigBee?- Compliant Platform-in-Package (PiP) for the 2.4 GHz IEEE? 802.15.4 Standard
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*