
1.5 Pin Functions
MB90580 series
Chapter 1: Overview
7
1.5 Pin Functions
Table 1.5a to Table 1.5d lists the functions. Table 1.5e to Table 1.5g list the I/O circuit formats.
Table 1.5a Pin functions (1/4) (STBC: With standby control)
QFP
LQFP
Pin name
I/O Circuit
Function
82
80
X0
A
Oscillator pin
83
81
X1
A
Oscillator pin
52
50
HSTX
C
Hardware standby input pin
77
75
RSTX
B
Reset input pin
85 to 92
83 to 90
P00 to P07
D
(CMOS/H)
General-purpose I/O ports
A pull-up resistor can be assigned (RD07-00=’1’) by using the pull-up resis-
tor setting register (RDR0). (D07-00=’1’: Invalid when set as output)
AD00 to
AD07
Low-order data I/O or low-order address output (AD00 to 07) in external
bus mode
93 to
100
91 to 98
P10 to P17
D
(CMOS/H)
General-purpose I/O ports
A pull-up resistor can be assigned (RD17-10=’1’) by using the pull-up resis-
tor setting register (RDR1). (D17-10=’1’: Invalid when set as output)
AD08 to
AD15
High-order data I/O or medium-order address output (AD08 to 15) in
external 16-bit bus mode
1 to 8
99 to 6
P20 to P27
F
(CMOS/H)
General-purpose I/O ports
Pins A16 to A19 when the corresponding bit of the HACR register is ’0’ in
external bus mode
A16 to A23
High-order address output (A16 to A19) when the corresponding bit of the
HACR register is ’1’ in external bus mode
9
7
P30
F
(CMOS/H)
General-purpose I/O port
ALE pin in external bus mode
ALE
Address fetch enable signal pin
10
8
P31
F
(CMOS/H)
General-purpose I/O port
RDX pin in external bus mode
RDX
Read strobe output (RDX) pin
12
10
P32
F
(CMOS/H)
General-purpose I/O port
WRX pin when the WRE bit is ’1’ in external bus mode
WRLX
Low-order data write strobe output (WRLX) pin
13
11
P33
F
(CMOS/H)
General-purpose I/O port
WRHX pin when the WRE bit of the EPCR register is
’1’ in external 16-bit bus mode
WRHX
High-order data write strobe output (WRHX) pin
14
12
P34
F
(CMOS/H)
General-purpose I/O port
HRQ pin when the HDE bit of the EPCR register is ’1’ in external bus mode
HRQ
Hold request input (HRQ) pin
15
13
P35
F
(CMOS/H)
General-purpose I/O port
HAKX pin when the HDE bit of the EPCR register is ’1’ in external bus
mode
HAKX
Hold acknowledgment output (HAKX) pin
16
14
P36
F
(CMOS/H)
General-purpose I/O port
RDY pin when the RYE bit of the EPCR register is ’1’ in external bus mode
RDY
External ready input (RDY) pin
17
15
P37
F
(CMOS/H)
General-purpose I/O port
CLK pin when the CKE bit of the EPCR register is ’1’ in external bus mode
CLK
Machine cycle clock output (CLK) pin
18
16
P40
E
(CMOS/H)
General-purpose I/O port
Serial input (SIN0) during UART0 operation
Open drain output port when OD40 of the open drain control setting regis-
ter (ODR4) is set to ’1’ (D40=’0’: Invalid when set as input)
SINO
UART0 serial data input (SIN0) pin