參數(shù)資料
型號: MB86967PFV
元件分類: 微控制器/微處理器
英文描述: 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁數(shù): 9/129頁
文件大?。?/td> 1519K
代理商: MB86967PFV
106
MB86967
(17)Burst DMA Access Timing
(VDD = +5 V
± 5%, GND = 0 V, Ta = 0°C to +70°C)
Parameter
Symbol
Value
Unit
Min.
Typ.
Max.
Hold time for DREQ output
t1
32
ns
Hold time for DMACK input (from IOR, IOW negate)
t2
3—
ns
Hold time for DREQ output
t3
4
28
ns
Hold time for DMACK input (from EOP/EOP negate)
t4
3—
ns
Setup time for DMACK input
t5
0—
ns
DREQ
DMACK
IOR, IOW
t1
t2
*2
*1
DREQ
DMACK
IOR, IOW
IOCHRDY*1
t5
t2
t1
t2
*2
Burst DMA access timing (Exiting DMA from the MB86967)
*1: This transition goes low at a single cycle before the last DMA when DLCR4 bit 2 is 1.
*2: This transition goes low at the last cycle of DMA when DLCR4 bit 2 is 0.
Burst DMA access timing (When DMA is interrupted by DMACK input)
*1: IOCHRDY signal timing is identical as that of bus timing.
*2: Interrupt period for DMA transfer
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