參數(shù)資料
型號(hào)： M44C092
廠商： ATMEL CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20
封裝： SSO-20
文件頁(yè)數(shù)： 72/84頁(yè)
文件大?。?/td> 643K
代理商： M44C092
M44C892
M44C092
Rev. A5, 14-Dec-01
74 (84)
Read Operations
The EEPROM allows byte-, word- and current address
read operations. The read operations are initiated in the
same way as write operations. Every read access is initi-
ated by sending the START condition followed by the
control byte which contains the address and the read
mode. After the device receives a read command it re-
turns an acknowledge, loads the addressed word into the
read\write buffer and sends the selected data byte to the
master. The master has to acknowledge the received byte
if it wants to proceed the read operation. If two bytes are
read out from the buffer the device increments respec-
tively decrements the word address automatically and
loads the buffer with the next word. The read mode bits
determines if the low or high byte is read first from the
buffer and if the word address is incremented or decre-
mented for the next read access. If the memory address
limit is reached, the data word address will ”roll over” and
the sequential read will continue. The master can termi-
nate the read operation after every byte by not responding
with an acknowledge (N) and by issuing a stop condition.
Read One Data Byte
Start
Control byte
A
Data byte 1
N
Stop
Read Two Data Bytes
Start
Control byte
A
Data byte 1
A
Data byte 2
N
Stop
Read n Data Bytes
Start
Control byte
A
Data byte 1
A
Data byte 2
A
– – – –
Data byte n
N
Stop
Read Control Bytes
MSB
LSB
Read low byte first, address increment
A4
A3
A2
A1
A0
C1
C0
R/NW
Row address
0
1
1
Byte order
LB(R)
HB(R)
LB(R+1)
HB(R+1)
– – –
LB(R+n)
HB(R+n)
MSB
LSB
Read high byte first, addr. decrement
A4
A3
A2
A1
A0
C1
C0
R/NW
Row address
1
0
1
Byte order
HB(R)
LB(R)
HB(R–1)
LB(R–1)
– – –
HB(R–n)
LB(R–n)
A –> acknowledge, N –> no acknowledge; HB: high byte; LB: low byte, R: row address
Initialization after a Reset Condition
The EEPROM with the serial interface has its own reset circuitry. In systems with microcontrollers that have their own
reset circuitry for power on reset, watchdog reset or brown-out reset, it may be necessary to bring the U505M into a
known state independent of its internal reset. This is performed by writing:
Start
Control byte
A
Data byte 1
N
Stop
to the serial interface. If the U505M acknowledges this sequence it is in a defined state. Maybe it is necessary to perform
this sequence twice.
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