![](http://datasheet.mmic.net.cn/90000/M37641M8-XXXHP_datasheet_3496247/M37641M8-XXXHP_72.png)
Rev.2.00
Aug 28, 2006
page 55 of 113
7641 Group
REJ09B0336-0200
HARDWARE
FUNCTIONAL DESCRIPTION
[USB Endpoint x (x = 1 to 4) IN Control Register] IN_CSR
This register contains the control and status information of the re-
spective IN Endpoints 1 to 4.
Set the IN_PKT_RDY bit to “1” after the data packet has been
written to the IN FIFO. This bit is cleared to “0” when the data
transfer is completed. In a bulk IN transfer, this bit is cleared when
an ACK signal is received from the host. If an ACK signal is not re-
ceived, this bit (and the TX_NOT_EMPTY bit) remains as “1”. This
same data packet is sent after the next IN token is received. The
FLUSH bit is for flushing the data in the IN FIFO.
USB endpoint x IN control register (address 005916)
IN_CSR
INT_PKT_RDY bit (INXCSR0)
0: End of a data packet transmission (Note 1)
1: Write “1” at completion of writing a data packet into IN FIFO.
(Note 3)
UNDER_RUN flag (INXCSR1) (In isochronous data transfer)
0: No FIFO underrun (Note 2)
1: FIFO underrun occurred (Note 1) (USB overrun/underrun interrupt
status flag is set to “0”.)
SEND_STALL bit (INXCSR2) (Note 2)
0: Except the following condition
1: Transmitting STALL handshake signal
ISO/TOGGLE_INIT bit (INXCSR3) (Note 2)
0: Except the following condition
1: Initializing to endpoint used for isochronous transfer;
Initializing the data toggle sequence bit
INTPT bit (INXCSR4) (Note 2)
0: Except the following condition
1: Initializing to endpoint used for interrupt transfer, rate feedback
TX_NOT_EPT flag (INXCSR5) (Note 1)
0: Empty in IN FIFO
1: Full in IN FIFO
FLUSH bit (INXCSR6)
0: Except the following condition (Note 1)
1: Flush FIFO. (Note 2)
AUTO_SET bit (INXCSR7) (Note 2)
0: AUTO_SET disabled
1: AUTO_SET enabled (Note 4)
b0
b7
Notes 1: This bit is automatically set to “1” or cleared to “0”.
2: The user must program to “1” or “0”.
3: When AUTO_SET bit is “0”, the user must set to “1”. When AUTO_SET bit is “1”, this
bit is automatically set to “1”.
4: To use the AUTO_SET function for an IN transfer when the AUTO_SET bit is set to
“1”, set the FIFO to single buffer mode.
Fig. 47 Structure of USB endpoint x (x = 1 to 4) IN control register