
Rev.2.00
Aug 28, 2006
page 58 of 148
7641 Group
REJ09B0336-0200
APPLICATION
2.4 UART
Fig. 2.4.8 Structure of Interrupt request register A
Interrupt request register A
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt request register A
(IREQA : address 0216)
b
0
1
2
3
4
5
6
7
Name
0
Functions
At reset R W
0
USB function interrupt
request bit
INT1 interrupt request bit
DMAC0 interrupt request
bit
UART1 receive buffer full
interrupt request bit
INT0 interrupt request bit
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
USB SOF interrupt request
bit
DMAC1 interrupt request
bit
UART1 transmit interrupt
request bit
0
: “0” can be set by software, but “1” cannot be set.
Interrupt request register B
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt request register B
(IREQB : address 0316)
b
0
1
2
3
4
5
6
7
Name
0
Functions
At reset R W
0
UART1 summing error
interrupt request bit
UART2 summing error
interrupt request bit
Timer X interrupt request
bit
Timer 1 receive buffer full
interrupt request bit
UART2 transmit interrupt
request bit
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
UART2 receive buffer full
interrupt request bit
Timer Y interrupt request
bit
Timer 2 transmit interrupt
request bit
0
: “0” can be set by software, but “1” cannot be set.
Fig. 2.4.9 Structure of Interrupt request register B