
Rev.2.00
Aug 28, 2006
page 39 of 108
7641 Group
REJ09B0336-0200
APPENDIX
3.3 Notes on use
instruction. After returning from Stop mode, reset the timer 1 (address 002416), timer 2 (address
002516), and the timer 123 mode register (address 002916).
3.3.10 Notes on Stop mode
When the STP instruction is executed, bit 7 of the clock control register (address 001F16) goes to
“0”. To return from stop mode, reset CCR7 to “1”.
When using fSYN (set internal system clock select bit (CPMA6) to “1”) as the internal system clock,
switch CPMA6 to “0” before executing the STP instruction. Reset CPMA6 after the system returns
from Stop Mode and the frequency synthesizer has stabilized.
CPMA6 does not need to be switched to “0” when using the WIT instruction.
When the STP instruction is executed or Reset occurs, the timer 1 is set to “FF16” and the internal
clock
φ divided by 8 is automatically selected as its count source. Additionally, the timer 2 is set
to “0116” and the timer 1’s output is automatically selected as its count source. When the STP
instruction is being executed, all bits except bit 4 of the timer 123 mode register (address 002916)
are initialized to “0”. It is not necessary to set T123M1 (timer 1 count stop bit) to “0” before
executing the STP instruction. After returning from Stop mode, reset the timer 1 (address 002416),
timer 2 (address 002516), and the timer 123 mode register (address 002916).
3.3.11 Notes on reset
(1) Connecting capacitor
In case where the RESET signal rise time is long, connect a ceramic capacitor or others across the
RESET pin and the VSS pin. Use a 1000 pF or more capacitor for high frequency use. When
connecting the capacitor, note the following :
Make the length of the wiring which is connected to a capacitor as short as possible.
Be sure to verify the operation of application products on the user side.
q Reason
If the several nanosecond or several ten nanosecond impulse noise enters the RESET pin, it may
cause a microcomputer failure.
3.3.12 Notes on I/O port
(1) Notes in standby state
In standby state1 for low-power dissipation, do not make input levels of an I/O port “undefined”.
Pull-up (connect the port to VCC) or pull-down (connect the port to VSS) these ports through a
resistor.
When determining a resistance value, note the following points:
External circuit
Variation of output levels during the ordinary operation
When using built-in pull-up resistor, note on varied current values:
When setting as an input port : Fix its input level
When setting as an output port : Prevent current from flowing out to external
q Reason
The potential which is input to the input buffer in a microcomputer is unstable in the state that input
levels of an I/O port are “undefined”. This may cause power source current.
1 standby state: stop mode by executing STP instruction
wait mode by executing WIT instruction