參數(shù)資料
型號: M37640E8FP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 24 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 64/96頁
文件大小: 1477K
代理商: M37640E8FP
67
Ver 1.4
MITSUBISHI MICROCOMPUTERS
7640 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Fig. 1.79. Data Bus Buffer Status Register 1 (DBBS1)
Fig. 1.80. Data Bus Buffer Control Register 1 (DBBC1)
DBBS17
DBBS15
DBBS14
DBBS13
DBBS12
DBBS11
DBBS10
MSB
7
LSB
0
Address: 004D
16
Access: R/W
Reset: 00
16
DBBS16
DBBS10
Output Buffer Full (OBF
1) Flag (bit 0)
0 : Output buffer empty.
1 : Output buffer full.
DBBS11
Input Buffer Full (BF0
1) Flag (bit 1)
0 : Input buffer empty.
1 : Input buffer full.
DBBS12
User Definable (U2) Flag (bit 3)
DBBS13
A
0(A01) Flag (bit 2)
Indicates the A
0 status when IBF flag is set
DBBS14
User Definable (U4) Flag (bit 4)
DBBS15
User Definable (U5) Flag (bit 5)
DBBS16
User Definable (U6) Flag (bit 6)
DBBS17
User Definable (U7) Flag (bit 7)
DBBC17
Reser ved
DBBC14
DBBC13
DBBC12
DBBC11
DBBC10
MSB
7
LSB
0
Address: 004E
6
Access: R/W
Reset: 00
16
Reser ved
DBBC10
OBF
1 Output Selection Bit (bit 0)
0: P7
4 pin is
operated as GPIO
1: P7
4 pin is
operated as PBF1 output pin if DBBC17 = “1”
DBBC11
IBF1 Output Selection Bit (bit 1)
0: P7
3 pin is
operated as GPIO
1: P7
3 pin is operated as IBF1 output pin if DBBC17= “1”
DBBC12
IBF1 Interrupt Selection Bit (bit 2)
0 : IBF
1 interr upt is generated by both write-data (A0= “0”) and write-
command (A0 = “1”)
1 : IBF
1 inter r upt is generated by write-command (A0 = “1”)only
DBBC13
Output Buffer 1 Empty interrupt disable Bit (bit 3)
0 : Enabled
1 : Disabled
DBBC14
Input Buffer 0 Full interrupt disable Bit (bit 4)
0 : Enabled
1 : Disabled
DBBC15
Reserved (Read/Write “0”)
DBBC16
Reserved (Read/Write “0”)
DBBC17
Data Bus Buffer Function Selection Bit (bit 7)
0 : Single data bus buffer - P7
2 is used as BPIO
1 : Double data bus buffer - P7
2 is used as S1 input
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