參數(shù)資料
型號： M37640E8FP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 24 MHz, MICROCONTROLLER, PQFP80
封裝： 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù)： 18/96頁
文件大?。?/td> 1477K
代理商： M37640E8FP
25
Ver 1.4
MITSUBISHI MICROCOMPUTERS
7640 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Fig. 1.22. Port Control Register (PTC)
Fig. 1.23. Pull-up Control Register (PUP2)
PTC7
PTC5
PTC4
PTC3
PTC2
PTC1
PTC0
MSB
7
LSB
0
Address: 0010
16
Access: R/W
Reset: 00
16
PTC6
PTC0
Slew Rate Control Bit Ports P0-P3 (bit 0)
0 : Disabled
1 : Enabled
PTC1
Slew Rate Control Bit Port P4 (bit 1)
0 : Disabled
1 : Enabled
PTC2
Slew Rate Control Bit Port P5 (bit 2)
0 : Disabled
1 : Enabled
PTC3
Slew Rate Control Bit Port P6 (bit 3)
0 : Disabled
1 : Enabled
PTC4
Slew Rate Control Bit Port P7 (bit 4)
0 : Disabled
1 : Enabled
PTC5
Slew Rate Control Bit Port P8 (bit 5)
0 : Disabled
1 : Enabled
PTC6
Port P2 Input Level Select Bit (bit 6)
0 : Reduced VIHL Level Input
1 : CMOS level input
PTC7
Master Bus Input Level Select Bit (bit 7)
0 : CMOS level input
1 : TTL level input
PUP2
7
PUP2
5
PUP2
4
PUP2
3
PUP2
2
PUP2
1
PUP2
0
MSB
7
LSB
0
Address: 0012
16
Access: R/W
Reset: 00
16
PUP2
6
PUP2
0
Pull-up Control for Port P2 (bit 0)
0 : Disabled
1 : Enabled
PUP2
1
Pull-up Control for Port P2 (bit 1)
0 : Disabled
1 : Enabled
PUP2
2
Pull-up Control for Port P2 (bit 2)
0 : Disabled
1 : Enabled
PUP2
3
Pull-up Control for Port P2 (bit 3)
0 : Disabled
1 : Enabled
PUP2
4
Pull-up Control for Port P2 (bit 4)
0 : Disabled
1 : Enabled
PUP2
5
Pull-up Control for Port P2 (bit 5)
0 : Disabled
1 : Enabled
PUP2
6
Pull-up Control for Port P2 (bit 6)
0 : Disabled
1 : Enabled
PUP2
7
Pull-up Control for Port P2 (bit 7)
0 : Disabled
1 : Enabled
1.14.2 Port Control Register (PTC)
This device is equipped with a port control register to
turn on and off the slew rate control and to control the
input levels for Port P2 and the MBI pins (see Figure
1.22).
1.14.3 Port P2 Pull-up Control Register (PUP2)
This device is equipped with internal pull ups on Port
P2 that can be enabled by software. Each bit of the
pull-up control register controls a corresponding pin of
Port P2. The pull-up control register pulls up the port
when the port is in input mode. The value of the pull-
up control regsiter has no effect when the port is in
output mode (see Figure 1.23).
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