參數(shù)資料
型號(hào)： M34502M2-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER, PDSO24
封裝： 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁(yè)數(shù)： 61/96頁(yè)
文件大?。?/td> 958K
代理商： M34502M2-XXXFP
64
Ver 1.4
MITSUBISHI MICROCOMPUTERS
7640 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
The USB Endpoint x FIFO Registers, shown in Fig-
ure 1.70 through Figure 1.74, are the USB IN
(transmit) and OUT (receive) FIFO data registers.
The CPU writes data to these registers for the corre-
sponding Endpoint IN FIFO and reads data from
these registers for the corresponding Endpoint OUT
FIFO.
Fig. 1.70. USB Endpoint 0 FIFO Register (USBFIFO0)
Fig. 1.71. USB Endpoint 1 FIFO Register (USBFIFO1)
Fig. 1.72. USB Endpoint 2 FIFO Register (USBFIFO)
Fig. 1.73. USB Endpoint 3 FIFO Register (USBFIFO3)
Fig. 1.74. USB Endpoint 4 FIFO Register (USBFIFO4)
Address: 0060
16
Access: R/W
Reset: N/A
Data_7:0
Endpoint 0 IN/OUT FIFO register
DATA_7
DATA_5 DATA_4 DATA_3 DATA_2 DATA_1 DATA_0
MSB
7
LSB
0
DATA_6
Address: 0061
16
Access: R/W
Reset: N/A
Data_7:0
Endpoint 1 IN/OUT FIFO register
DATA_7
DATA_5 DATA_4 DATA_3 DATA_2 DATA_1 DATA_0
MSB
7
LSB
0
DATA_6
Address: 0063
16
Access: R/W
Reset: N/A
Data_7:0
Endpoint 3 IN/OUT FIFO register
DATA_7
DATA_5 DATA_4 DATA_3 DATA_2 DATA_1 DATA_0
MSB
7
LSB
0
DATA_6
Address: 0064
16
Access: R/W
Reset: N/A
Data_7:0
Endpoint 4 IN/OUT FIFO register
DATA_7
DATA_5 DATA_4 DATA_3 DATA_2 DATA_1 DATA_0
MSB
7
LSB
0
DATA_6
Address: 0062
16
Access: R/W
Reset: N/A
Data_7:0
Endpoint 2 IN/OUT FIFO register
DATA_7
DATA_5 DATA_4 DATA_3 DATA_2 DATA_1 DATA_0
MSB
7
LSB
0
DATA_6
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