參數(shù)資料
型號(hào)： M34502M2-XXXFP
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER, PDSO24
封裝： 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁(yè)數(shù)： 54/96頁(yè)
文件大?。?/td> 958K
代理商： M34502M2-XXXFP
58
Ver 1.4
MITSUBISHI MICROCOMPUTERS
7640 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
The
USB
Frame
Number
Low
Register
(USBSOFL), shown in Figure 1.59, contains the
lower 8 bits of the 11-bit frame number received from
the host.
The
USB
Frame
Number
High
Register
(USBSOFH), shown in Figure 1.60, contains the up-
per 3 bits of the 11-bit frame number received from
the host.
The USB Endpoint Index Register (USBINDEX),
shown in Figure 1.61, identifies the endpoint pair. It
serves as an index to endpoint-specific IN CSR, OUT
CSR, IN MAXP, OUT MAXP and OUT WRT CNT reg-
isters.
This register also contains two global bits, ISO_UPD
and AUTO_FL, which affect isochronous data trans-
fers for endpoints 1-4.
Fig. 1.59. USB Frame Number Low Register (USBSOFL)
Fig. 1.60. USB Frame Number High Register (USBSOFH)
Fig. 1.61. USB Endpoint Index Register (USBINDEX)
If ISO_UPD = “0”, a data packet in an endpoint’s IN
FIFO is always ‘ready to transmit’ upon receiving the
next IN_TOKEN from the host (with matched address
and endpoint number). If ISO_UPD = “1” and the ISO
bit of the corresponding endpoint’s IN CSR is set,
then the internal ‘ready to transmit’ signal to the trans-
mit control logic is delayed until the next SOF. In this
way the data loaded in frame n will be transmitted out
in frame n+1. The ISO_UPD bit is a global bit for end-
points 1 to 4, and works with isochronous pipes only.
If AUTO_FL = “1”, ISO_UPD = “1”, and a particular IN
endpoint’s ISO bit is set, then when the USB FCU de-
tects an SOF packet, if the corresponding IN
endpoint’s IN_PKT_RDY = “1”, the USB FCU auto-
matically flushes the oldest packet from the IN FIFO.
In this case, IN_PKT_RDY = “1” indicates that two
data packet are in the IN FIFO. Since, for ISO trans-
fer, double buffering is a requirement; MAXP must set
to be less than or equal to 1/2 of the FIFO size.
ISO_UPD
Reser ved
Reser ved Reser ved
EPINDX2 EPINDX1 EPINDX0
MSB
7
LSB
0
AUTO_FL
Address: 0058
16
Access: R/W
Reset: 00
16
EPINDX2:0 Endpoint Index:
Bit 2
Bit 1
Bit 0
0
0:
Function Endpoint 0
0
1:
Function Endpoint 1
0
1
0:
Function Endpoint 2
0
1
1:
Function Endpoint 3
1
0
0:
Function Endpoint 4
Others:
Undefined
Bits 3:5
Reser ved (Read/Write "0")
AUTO_FL
AUTO_FLUSH Bit (bit 6)
0:
Hardware auto FIFO flush disabled
1:
Hardware auto FIFO flush enabled
ISO_UPD
ISO_UPDATE Bit (Bit 7)
0:
ISO_UPDATE disabled
1:
ISO_UPDATE enabled
FN7
FN5
FN4
FN3
FN2
FN1
FN0
MSB
7
LSB
0
FN6
Address: 0056
16
Access: R
Reset: 00
16
FN7:0
Lower 8 bits of 11-bit frame number issued with a SOF token
Reser ved
Reser ved Reser ved
FN10
FN9
FN8
MSB
7
LSB
0
Reser ved
Address: 0057
Access: R
Reset: 00
16
FN10:8
Upper 3 bits of the 11-bit frame number issued with a SOF token
Bits 7:3
Reserved (Read "0")
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