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參數(shù)資料
| 型號： | M306V5EESP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PDIP64 |
| 封裝： | 0.750 INCH, PLASTIC, SDIP-64 |
| 文件頁數(shù)： | 34/152頁 |
| 文件大?。?/td> | 1963K |
| 代理商： | M306V5EESP |
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156
ATtiny25/45/85 [DATASHEET]
2586Q–AVR–08/2013
20.7.1
Enter High-voltage Serial Programming Mode
The following algorithm puts the device in High-voltage Serial Programming mode:
1.
Set Prog_enable pins listed in Table 20-14 to “000”, RESET pin and V
CC to 0V.
2.
Apply 4.5 - 5.5V between V
CC and GND. Ensure that VCC reaches at least 1.8V within the next 20 s.
3.
Wait 20 - 60 s, and apply 11.5 - 12.5V to RESET.
4.
Keep the Prog_enable pins unchanged for at least 10 s after the High-voltage has been applied to
ensure the Prog_enable Signature has been latched.
5.
Release the Prog_enable[2] pin to avoid drive contention on the Prog_enable[2]/SDO pin.
6.
Wait at least 300 s before giving any serial instructions on SDI/SII.
7.
Exit Programming mode by power the device down or by bringing RESET pin to 0V.
If the rise time of the V
CC is unable to fulfill the requirements listed above, the following alternative algorithm can be
used:
1.
Set Prog_enable pins listed in Table 20-14 to “000”, RESET pin and V
CC to 0V.
2.
Apply 4.5 - 5.5V between V
CC and GND.
3.
Monitor V
CC, and as soon as VCC reaches 0.9 - 1.1V, apply 11.5 - 12.5V to RESET.
4.
Keep the Prog_enable pins unchanged for at least 10 s after the High-voltage has been applied to
ensure the Prog_enable Signature has been latched.
5.
Release the Prog_enable[2] pin to avoid drive contention on the Prog_enable[2]/SDO pin.
6.
Wait until V
CC actually reaches 4.5 - 5.5V before giving any serial instructions on SDI/SII.
7.
Exit Programming mode by power the device down or by bringing RESET pin to 0V.
20.7.2
Considerations for Efficient Programming
The loaded command and address are retained in the device during programming. For efficient programming, the
following should be considered.
The command needs only be loaded once when writing or reading multiple memory locations.
Skip writing the data value 0xFF that is the contents of the entire EEPROM (unless the EESAVE Fuse is
programmed) and Flash after a Chip Erase.
Address High byte needs only be loaded before programming or reading a new 256 word window in Flash or
256 byte EEPROM. This consideration also applies to Signature bytes reading.
20.7.3
Chip Erase
The Chip Erase will erase the Flash and EEPROM(1) memories plus Lock bits. The Lock bits are not reset until the
Program memory has been completely erased. The Fuse bits are not changed. A Chip Erase must be performed
before the Flash and/or EEPROM are re-programmed.
Note:
1. The EEPROM memory is preserved during Chip Erase if the EESAVE Fuse is programmed.
Table 20-15. High-voltage Reset Characteristics
Supply Voltage
RESET Pin High-voltage Threshold
Minimum High-voltage Period for
Latching Prog_enable
VCC
VHVRST
tHVRST
4.5V
11.5V
100 ns
5.5V
11.5V
100 ns
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