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參數(shù)資料
| 型號： | LM12L454CIV |
| 英文描述： | IC-SM-12 BIT DAS |
| 中文描述： | 集成電路的Sm - DAS的12位 |
| 文件頁數(shù)： | 7/36頁 |
| 文件大小： | 538K |
| 代理商： | LM12L454CIV |
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Digital Timing Characteristics
The following specifications apply to the LM12L454 and LM12L458 for V
A
a
e
V
D
a
e
3.3V, t
r
e
t
f
e
3 ns, and C
L
e
100 pF
on data I/O, INT and DMARQ lines unless otherwise specified.
Boldface limits apply for T
A
e
T
J
e
T
MIN
to T
MAX
; all
other limits T
A
e
T
J
e
25
§
C. (Notes 6, 7, and 8) (Continued)
Symbol
(SeeFigures
8a, 8b, and8c)
Typical
(Note 10)
Limits
(Note 11)
Unit
(Limit)
Parameter
Conditions
20
Address Valid or CS Low to RD Low
20
ns (min)
21
Address Valid or CS Low to WR Low
20
ns (min)
19
Address Invalid
from RD or WR High
10
ns (min)
22
INT High from RD Low
30
10
60
ns (min)
ns (max)
23
DMARQ Low from RD Low
30
10
60
ns (min)
ns (max)
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2:
All voltages are measured with respect to GND, unless otherwise specified.
Note 3:
When the input voltage (V
IN
) at any pin exceeds the power supply rails (V
IN
k
GND or V
IN
l
(V
A
a
or V
D
a
)), the current at that pin should be limited to
5 mA. The 20 mA maximum package input current rating allows the voltage at any four pins, with an input current of 5 mA, to simultaneously exceed the power
supply voltages.
Note 4:
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
Jmax
(maximum junction temperature),
H
JA
(package
junction to ambient thermal resistance), and T
A
(ambient temperature). The maximum allowable power dissipation at any temperature is PD
max
e
(T
Jmax
b
T
A
)/
H
JA
or the number given in the Absolute Maximum Ratings, whichever is lower. For this device, T
Jmax
e
150
§
C, and the typical thermal resistance (
H
JA
) of the
LM12L454 and LM12L458 in the V package, when board mounted, is 47
§
C/W.
Note 5:
Human body model, 100 pF discharged through a 1.5 k
X
resistor.
Note 6:
Two on-chip diodes are tied to each analog input through a series resistor, as shown below. Input voltage magnitude up to 5V above V
A
a
or 5V below
GND will not damage the LM12L454 or the LM12L458. However, errors in the A/D conversion can occur if these diodes are forward biased by more than 100 mV.
As an example, if V
A
a
is 3.0 V
DC
, full-scale input voltage must be
s
3.1 V
DC
to ensure accurate conversions.
TL/H/11711–4
Note 7:
V
A
a
and V
D
a
must be connected together to the same power supply voltage and bypassed with separate capacitors at each V
a
pin to assure
conversion/comparison accuracy.
Note 8:
Accuracy is guaranteed when operating at f
CLK
e
6 MHz.
Note 9:
With the test condition for V
REF
e
V
REF
a
b
V
REF
b
given as
a
2.5V, the 12-bit LSB is 305
m
V and the 8-bit/‘‘Watchdog’’ LSB is 4.88 mV.
Note 10:
Typicals are at T
A
e
25
§
C and represent most likely parametric norm.
Note 11:
Limits are guaranteed to National’s AOQL (Average Output Quality Level).
Note 12:
Positive integral linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive full-
scale and zero. For negative integral linearity error the straight line passes through negative full-scale and zero. (See Figures 5b and 5c).
Note 13:
Zero error is a measure of the deviation from the mid-scale voltage (a code of zero), expressed in LSB. It is the worst-case value of the code transitions
between
b
1 to 0 and 0 to
a
1 (see Figure 6).
Note 14:
The DC common-mode error is measured with both inputs shorted together and driven from 0V to 2.5V. The measured value is referred to the resulting
output value when the inputs are driven with a 1.25V signal.
Note 15:
Power Supply Sensitivity is measured after Auto-Zero and/or Auto-Calibration cycle has been completed with V
A
a
and V
D
a
at the specified extremes.
Note 16:
V
REFCM
(Reference Voltage Common Mode Range) is defined as (V
REF
a
a
V
REF
b
)/2.
Note 17:
The LM12L454/8’s self-calibration technique ensures linearity and offset errors as specified, but noise inherent in the self-calibration process will result in
a repeatability uncertainty of
g
0.10 LSB.
Note 18:
The Throughput Rate is for a single instruction repeated continuously. Sequencer states 0 (1 clock cycle), 1 (1 clock cycle), 7 (9 clock cycles) and 5 (44
clock cycles) are used (see Figure 11). One additional clock cycle is used to read the conversion result stored in the FIFO, for a total of 56 clock cycles per
conversion. The Throughput Rate is f
CLK
(MHz)/N, where N is the number of clock cycles/conversion.
7
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM12L458 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit + Sign Data Acquisition System with Self-Calibration |
| LM12L458_06 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit + Sign Data Acquisition System with Self-Calibration |
| LM12L458CIV | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| LM12L458CIV/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| LM12L458CIVF | 制造商:Rochester Electronics LLC 功能描述:12-BIT PARALLEL I/O DAS - Bulk |
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