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參數(shù)資料
| 型號： | LM12L454CIV |
| 英文描述： | IC-SM-12 BIT DAS |
| 中文描述： | 集成電路的Sm - DAS的12位 |
| 文件頁數(shù)： | 25/36頁 |
| 文件大小： | 538K |
| 代理商： | LM12L454CIV |
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4.0 Sequencer
The Sequencer uses a 3-bit counter (Instruction Pointer, or
IP, in Figure 7) to retrieve the programmable conversion
instructions stored in the Instruction RAM. The 3-bit counter
is reset to 000 during chip reset or if the current executed
instruction has its Loop bit (Bit 1 in any Instruction RAM
‘‘00’’) set high (‘‘1’’). It increments at the end of the currently
executed instruction and points to the next instruction. It will
continue to increment up to 111 unless an instruction’s
Loop bit is set. If this bit is set, the counter resets to ‘‘000’’
and execution begins again with the first instruction. If all
instructions have their Loop bit reset to ‘‘0’’, the Sequencer
will execute all eight instructions continuously. Therefore, it
is important to realize that if less than eight instructions are
programmed, the Loop bit on the last instruction must be
set. Leaving this bit reset to ‘‘0’’ allows the Sequencer to
execute ‘‘unprogrammed’’ instructions, the results of which
may be unpredictable.
The Sequencer’s Instruction Pointer value is readable at
any time and is found in the Status register at Bits 8–10.
The Sequencer can go through eight states during instruc-
tion execution:
State 0:
The current instruction’s first 16 bits are read
from the Instruction RAM ‘‘00’’. This state is one clock cycle
long.
State 1:
Checks the state of the Calibration and Start bits.
This is the ‘‘rest’’ state whenever the Sequencer is stopped
using the reset, a Pause command, or the Start bit is reset
low (‘‘0’’). When the Start bit is set to a ‘‘1’’, this state is one
clock cycle long.
State 2:
Perform calibration. If bit 2 or bit 6 of the Configu-
ration register is set to a ‘‘1’’, state 2 is 76 clock cycles long.
If the Configuration register’s bit 3 is set to a ‘‘1’’, state 2 is
4944 clock cycles long.
State 3:
Run the internal 16-bit Timer. The number of
clock cycles for this state varies according to the value
stored in the Timer register. The number of clock cycles is
found by using the expression below
32T
a
2
where 0
s
T
s
2
16
b
1.
State 7:
Run the acquisition delay and read Limit
Y
1’s
value if needed. The number of clock cycles for 12-bit
a
sign mode varies according to
9
a
2D
where D is the user-programmable 4-bit value stored in bits
12–15 of Instruction RAM ‘‘00’’ and is limited to 0
s
D
s
15.
The number of clock cycles for 8-bit
a
sign or ‘‘watchdog’’
mode varies according to
2
a
2D
where D is the user-programmable 4-bit value stored in bits
12–15 of Instruction RAM ‘‘00’’ and is limited to 0
s
D
s
15.
State 6:
Perform first comparison. This state is 5 clock
cycles long.
State 4:
Read Limit
Y
2. This state is 1 clock cycle long.
State 5:
Perform a conversion or second comparison.
This state takes 44 clock cycles when using the 12-bit
a
sign mode or 21 clock cycles when using the 8-bit
a
sign
mode. The ‘‘watchdog’’ mode takes 5 clock cycles.
25
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM12L458 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit + Sign Data Acquisition System with Self-Calibration |
| LM12L458_06 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit + Sign Data Acquisition System with Self-Calibration |
| LM12L458CIV | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| LM12L458CIV/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| LM12L458CIVF | 制造商:Rochester Electronics LLC 功能描述:12-BIT PARALLEL I/O DAS - Bulk |
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