參數(shù)資料
型號: LAN9117-MD
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER
中文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: TQFP-100
文件頁數(shù): 60/131頁
文件大?。?/td> 1531K
代理商: LAN9117-MD
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Revision 1.1 (05-17-05)
60
SMSC LAN9117
DATASHEET
Note 3.16
The LAN9117 host bus interface supports 16-bit bus transfers; internally, all data paths are
32-bits wide.
Figure 3.19
describes the host read ordering for pairs of atomic 16-bit
transactions.
3.14.3
RX Status Format
Figure 3.19 RX Packet Format
BITS
DESCRIPTION
31
Reserved.
This bit is reserved. Reads 0.
30
Filtering Fail.
When set, this bit indicates that the associated frame failed the address recognizing
filtering.
29:16
Packet Length.
The size, in bytes, of the corresponding received frame.
15
Error Status (ES).
When set this bit indicates that the MIL has reported an error. This bit is the
Internal logical “or” of bits 11,7,6 and 1.
14
Reserved.
These bits are reserved. Reads 0.
13
Broadcast Frame.
When set, this bit indicates that the received frame has a Broadcast address.
12
Length Error (LE).
When set, this bit indicates that the actual length does not match with the
length/type field of the received frame.
ofs + First Data DWORD
.
.
.
.
Last Data DWORD
0
31
Host Read
Order
1st
2nd
Last
Optional Pad DWORD0
.
.
Optional Pad DWORDn
Optional offset DWORD0
.
.
Optional offset DWORDn
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LAN9117-MT HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER
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