- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373065 > K4S160822D (SAMSUNG SEMICONDUCTOR CO. LTD.) 2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL PDF資料下載
參數(shù)資料
| 型號： | K4S160822D |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL |
| 中文描述： | 2Mx8 SDRAM的1M × 8位× 2銀行同步DRAM LVTTL |
| 文件頁數(shù)： | 5/46頁 |
| 文件大?。?/td> | 1183K |
| 代理商： | K4S160822D |
第1頁第2頁第3頁第4頁當(dāng)前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
K4S160822D
CMOS SDRAM
- 5 -
Rev. 1.0 (Oct. 1999)
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Voltage on any pin relative to V
SS
V
IN
, V
OUT
-1.0 ~ 4.6
V
Voltage on V
DD
supply relative to V
SS
V
DD
, V
DDQ
-1.0 ~ 4.6
V
Storage temperature
T
STG
-55 ~ +150
°
C
Power dissipation
P
D
1
W
Short circuit current
I
OS
50
mA
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Note :
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= 0 to 70
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply voltage
V
DD
, V
DDQ
3.0
3.3
3.6
V
Input logic high voltage
V
IH
2.0
3.0
V
DDQ
+0.3
V
1
Input logic low voltage
V
IL
-0.3
0
0.8
V
2
Output logic high voltage
V
OH
2.4
-
-
V
I
OH
= -2mA
Output logic low voltage
V
OL
-
-
0.4
V
I
OL
= 2mA
Input leakage current (Inputs)
I
LI
-10
-
10
uA
3
input leakage current (I/O pins)
I
LO
-10
-
10
uA
3,4
CAPACITANCE
(V
DD
= 3.3V, T
A
= 23
°
C, f = 1MHz, V
REF
= 1.4V
±
200
mV)
Pin
Symbol
Min
Max
Unit
Clock
C
CLK
2.5
4.0
pF
RAS, CAS, WE, CS, CKE, DQM
C
IN
2.5
5.0
pF
Address
C
ADD
2.5
5.0
pF
DQ
0
~ DQ
7
C
OUT
4.0
6.5
pF
1. V
IH
(max) = 5.6V AC. The overshoot voltage duration is
≤
3ns.
2. V
IL
(min) = -2.0V AC. The undershoot voltage duration is
≤
3ns.
3. Any input 0V
≤
V
IN
≤
V
DDQ
.
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. Dout is disabled, 0V
≤
V
OUT
≤
V
DDQ.
Notes :
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4S161622D | 512K x 16Bit x 2 Banks Synchronous DRAM |
| K4S161622E | 1M x 16 SDRAM |
| K4S161622E-TC10 | 1M x 16 SDRAM |
| K4S161622E-TC55 | 1M x 16 SDRAM |
| K4S161622E-TC60 | 1M x 16 SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4S160822DT-G/F10 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL |
| K4S160822DT-G/F7 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL |
| K4S160822DT-G/F8 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL |
| K4S160822DT-G/FH | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL |
| K4S160822DT-G/FL | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。