參數(shù)資料
型號(hào): K4S160822D
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL
中文描述: 2Mx8 SDRAM的1M × 8位× 2銀行同步DRAM LVTTL
文件頁(yè)數(shù): 43/46頁(yè)
文件大小: 1183K
代理商: K4S160822D
KM48S2120D
CMOS SDRAM
- 43
Rev.1.0 (Mar. 1999)
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Active/Precharge Power Down Mode @CAS Latency=2, Burst Length=4
Precharge
Power-down
Entry
: Don't care
*Note :
1. Both banks should be in idle state prior to entering precharge power down mode.
2. CKE should be set high at least 1CLK + tss prior to Row active command.
3. Can not violate minimum refresh specification. (32ms)
*Note 1
Precharge
tSS
*Note 2
BA
DQ
ADDR
CAS
RAS
CS
CKE
CLOCK
WE
DQM
A
10
/AP
tSS
tSS
Ra
Ca
Ra
Qa0
Qa1
Qa2
Row Active
Precharge
Power-down
Exit
Active
Power-down
Entry
Active
Power-down
Exit
Read
tSHZ
*Note 3
*Note 2
相關(guān)PDF資料
PDF描述
K4S161622D 512K x 16Bit x 2 Banks Synchronous DRAM
K4S161622E 1M x 16 SDRAM
K4S161622E-TC10 1M x 16 SDRAM
K4S161622E-TC55 1M x 16 SDRAM
K4S161622E-TC60 1M x 16 SDRAM
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