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參數(shù)資料
| 型號： | JS28F128P30T85 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | Intel StrataFlash Embedded Memory |
| 中文描述： | 8M X 16 FLASH 1.8V PROM, 85 ns, PDSO56 |
| 封裝： | 14 X 20 MM, LEAD FREE, TSOP-56 |
| 文件頁數(shù)： | 70/102頁 |
| 文件大?。?/td> | 1609K |
| 代理商： | JS28F128P30T85 |
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1-Gbit P30 Family
April 2005
70
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
down state, a Lock-Down command must be issued prior to changing WP# to V
IL
. Locked-down
blocks revert to the locked state upon reset or power up the device (see
Figure 32, “Block Locking
State Diagram” on page 70
).
13.1.4
Block Lock Status
The Read Device Identifier command is used to determine a block’s lock status (see
Section 14.2,
“Read Device Identifier” on page 76
). Data bits DQ[1:0] display the addressed block’s lock status;
DQ0 is the addressed block’s lock bit, while DQ1 is the addressed block’s lock-down bit.
13.1.5
Block Locking During Suspend
Block lock and unlock changes can be performed during an erase suspend. To change block
locking during an erase operation, first issue the Erase Suspend command. Monitor the Status
Register until SR[7] and SR[6] are set, indicating the device is suspended and ready to accept
another command.
Next, write the desired lock command sequence to a block, which changes the lock state of that
block. After completing block lock or unlock operations, resume the erase operation using the
Erase Resume command.
Note:
A Lock Block Setup command followed by any command other than Lock Block, Unlock Block,
or Lock-Down Block produces a command sequence error and set Status Register bits SR[4] and
Figure 32.
Block Locking State Diagram
[X00]
[X01]
Power-Up/Reset
Unlocked
Locked
[011]
[111]
[110]
Locked-
Down
Software
Locked
[011]
Hardware
Locked
Unlocked
WP# Hardware Control
Notes:
1. [a,b,c] represents [WP#, DQ1, DQ0]. X = Don’t Care.
2. DQ1 indicates Block Lock-Down status. DQ1 = ‘0’, Lock-Down has not been issued
to this block. DQ1 = ‘1’, Lock-Down has been issued to this block.
3. DQ0 indicates block lock status. DQ0 = ‘0’, block is unlocked. DQ0 = ‘1’, block is
locked.
4. Locked-down = Hardware + Software locked.
5. [011] states should be tracked by system software to determine difference between
Hardware Locked and Locked-Down states.
Software Block Lock (0x60/0x01) or Software Block Unlock (0x60/0xD0)
Software Block Lock-Down (0x60/0x2F)
WP# hardware control
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| JS28F128P30T85A | 功能描述:IC FLASH 128MBIT 85NS 56TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 標準包裝:1 系列:- 格式 - 存儲器:RAM 存儲器類型:SDRAM 存儲容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869 |
| JS28F128P30TF75A | 功能描述:IC FLASH 128MBIT 65NM 56TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:Axcell™ 標準包裝:2,000 系列:MoBL® 格式 - 存儲器:RAM 存儲器類型:SRAM - 異步 存儲容量:16M（2M x 8，1M x 16） 速度:45ns 接口:并聯(lián) 電源電壓:2.2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFBGA 供應(yīng)商設(shè)備封裝:48-VFBGA（6x8） 包裝:帶卷 (TR) |
| JS28F128P33B85A | 功能描述:IC FLASH 128MBIT 85NS 56TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標準包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
| JS28F128P33BF700 | 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Trays |
| JS28F128P33BF70A | 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH 128MBIT 70NS 56TSOP 制造商:Micron Technology Inc 功能描述:FLASH PARALLEL 128MBIT 56TSOP 制造商:Micron Technology Inc 功能描述:FLASH, PARALLEL, 128MBIT, 56TSOP 制造商:Micron Technology Inc 功能描述:FLASH, PARALLEL, 128MBIT, 56TSOP, Memory Type:Flash - NOR, Memory Size:128Mbit, Memory Configuration:8M x 16, Supply Voltage Min:2.3V, Supply Voltage Max:3.6V, Memory Case Style:TSOP, No. of Pins:56, Access Time:70ns, IC Interface , RoHS Compliant: Yes 制造商:Micron Technology Inc 功能描述:Flash Memory 128Mb,3V,70ns,TSOP56 |
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