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參數(shù)資料
| 型號： | JS28F128P30T85 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | Intel StrataFlash Embedded Memory |
| 中文描述： | 8M X 16 FLASH 1.8V PROM, 85 ns, PDSO56 |
| 封裝： | 14 X 20 MM, LEAD FREE, TSOP-56 |
| 文件頁數(shù)： | 66/102頁 |
| 文件大?。?/td> | 1609K |
| 代理商： | JS28F128P30T85 |
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1-Gbit P30 Family
April 2005
66
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
When a programming operation is executing, issuing the Program Suspend command requests the
WSM to suspend the programming algorithm at predetermined points. The device continues to
output Status Register data after the Program Suspend command is issued. Programming is
suspended when Status Register bits SR[7,2] are set. Suspend latency is specified in
Section 7.5,
“Program and Erase Characteristics” on page 45
.
To read data from the device, the Read Array command must be issued. Read Array, Read Status
Register, Read Device Identifier, CFI Query, and Program Resume are valid commands during a
program suspend.
During a program suspend, deasserting CE# places the device in standby, reducing active current.
V
PP
must remain at its programming level, and WP# must remain unchanged while in program
suspend. If RST# is asserted, the device is reset.
11.5
Program Resume
The Resume command instructs the device to continue programming, and automatically clears
Status Register bits SR[7,2]. This command can be written to any address. If error bits are set, the
Status Register should be cleared before issuing the next instruction. RST# must remain deasserted
(see
Figure 41, “Program Suspend/Resume Flowchart” on page 86
).
11.6
Program Protection
When V
PP
= V
IL
, absolute hardware write protection is provided for all device blocks. If V
PP
is at
or below V
PPLK
, programming operations halt and SR[3] is set indicating a V
PP
-level error. Block
lock registers are not affected by the voltage level on V
PP
; they may still be programmed and read,
even if V
PP
is less than V
PPLK
.
Figure 31.
Example VPP Supply Connections
Factory Programming with
V
PP
= V
PPH
Complete write/Erase Protection when
V
PP
≤
V
PPLK
VCC
VPP
VCC
VPP
Low Voltage and Factory Programming
Low-voltage Programming only
Logic Control of Device Protection
VCC
VPP
Low Voltage Programming Only
Full Device Protection Unavailable
VCC
VPP
≤
10K
V
PP
V
CC
V
CC
PROT #
V
CC
V
PP
=V
PPH
V
CC
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| JS28F128P30T85A | 功能描述:IC FLASH 128MBIT 85NS 56TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 標準包裝:1 系列:- 格式 - 存儲器:RAM 存儲器類型:SDRAM 存儲容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應商設備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869 |
| JS28F128P30TF75A | 功能描述:IC FLASH 128MBIT 65NM 56TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:Axcell™ 標準包裝:2,000 系列:MoBL® 格式 - 存儲器:RAM 存儲器類型:SRAM - 異步 存儲容量:16M（2M x 8，1M x 16） 速度:45ns 接口:并聯(lián) 電源電壓:2.2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFBGA 供應商設備封裝:48-VFBGA（6x8） 包裝:帶卷 (TR) |
| JS28F128P33B85A | 功能描述:IC FLASH 128MBIT 85NS 56TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標準包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應商設備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
| JS28F128P33BF700 | 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Trays |
| JS28F128P33BF70A | 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH 128MBIT 70NS 56TSOP 制造商:Micron Technology Inc 功能描述:FLASH PARALLEL 128MBIT 56TSOP 制造商:Micron Technology Inc 功能描述:FLASH, PARALLEL, 128MBIT, 56TSOP 制造商:Micron Technology Inc 功能描述:FLASH, PARALLEL, 128MBIT, 56TSOP, Memory Type:Flash - NOR, Memory Size:128Mbit, Memory Configuration:8M x 16, Supply Voltage Min:2.3V, Supply Voltage Max:3.6V, Memory Case Style:TSOP, No. of Pins:56, Access Time:70ns, IC Interface , RoHS Compliant: Yes 制造商:Micron Technology Inc 功能描述:Flash Memory 128Mb,3V,70ns,TSOP56 |
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