參數(shù)資料
型號: ISP1582
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: 高速通用串行總線外設(shè)控制器
文件頁數(shù): 50/66頁
文件大?。?/td> 325K
代理商: ISP1582
Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
Preliminary data
Rev. 03 — 25 August 2004
50 of 66
9397 750 13699
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.5.5
Unlock Device register (address: 7Ch)
To protect the registers from getting corrupted when the ISP1582 goes into suspend,
the write operation is disabled if bit PWRON in the Mode register is set to logic 0. In
this case, when the chip resumes, the Unlock Device command must be first issued
to this register before attempting to write to the rest of the registers. This is done by
writing unlock code (AA37h) to this register.
The bit allocation of the Unlock Device register is given in
Table 73
.
When bit PWRON in the Mode register is logic 1, the chip is powered. In such a case,
you do not need to issue the Unlock command because the microprocessor is
powered and therefore, the RD_N, WR_N and CS_N signals maintain their states.
Table 71:
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Scratch register: bit allocation
15
14
13
12
11
10
9
8
SFIRH[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
7
R/W
6
R/W
5
R/W
4
R/W
3
R/W
2
R/W
1
R/W
0
SFIRL[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 72:
Bit
15 to 8
7 to 0
Scratch register: bit description
Symbol
SFIRH[7:0]
SFIRL[7:0]
Description
Scratch firmware information register (higher byte)
Scratch firmware information register (lower byte)
Table 73:
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Unlock Device register: bit allocation
15
14
13
12
11
10
9
8
ULCODE[15:8] = AAh
not applicable
not applicable
W
4
ULCODE[7:0] = 37h
not applicable
not applicable
W
W
7
W
6
W
5
W
3
W
2
W
1
W
0
W
W
W
W
W
W
W
Table 74:
Bit
15 to 0
Unlock Device register: bit description
Symbol
Description
ULCODE[15:0]
Writing data AA37h unlocks the internal registers and FIFOs
for writing, following a resume.
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