參數(shù)資料
型號(hào): ISP1582
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: 高速通用串行總線外設(shè)控制器
文件頁(yè)數(shù): 18/66頁(yè)
文件大?。?/td> 325K
代理商: ISP1582
Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
Preliminary data
Rev. 03 — 25 August 2004
18 of 66
9397 750 13699
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table 4
shows power modes in which the ISP1582 can be operated.
[1]
Power supply to the IC (V
CC
) is 3.3 V. Therefore, if the application is bus-powered, a 3.3 V regulator
needs to be used.
V
CC(I/O)
= V
CC
. If the application is bus-powered, a voltage regulator needs to be used.
[2]
8.14.1
Power-sharing mode
As can be seen in
Figure 12
, in power-sharing mode, V
CC
is supplied by the output of
the 5 V-to-3.3 V voltage regulator. The input to the regulator is from V
BUS
. V
CC(I/O)
is
supplied through the power source of the system. When the USB cable is plugged in,
the ISP1582 goes through the power-on reset cycle. In this mode, OTG is disabled.
The processor will experience continuous interrupt because the default status of the
interrupt pin when operating in sharing mode with the V
BUS
not present is LOW. To
overcome this, implement external V
BUS
sensing circuitry. The output from the voltage
regulator can be connected to pin GPIO of the processor to qualify the interrupt from
the ISP1582.
Remark:
When the core power is removed, the ISP1582 must be reset using the
RESET_N pin. The reset pulse width must be 2 ms.
Table 4:
V
CC
V
BUS
[1]
self-powered
V
BUS
[1]
Power modes
V
CC(I/O)
V
BUS
[2]
self-powered
self-powered
Power mode
bus-powered
self-powered
power-sharing (hybrid)
Fig 12. Power-sharing mode.
004aaa457
ISP1582
+
5 V-to-3.3 V
VOLTAGE
REGULATOR
USB
To GPIO of processor
for sensing VBUS
1 M
VCC
VCC(I/O)
VBUS
RPU
VBUS
1 μF
+
1.5 k
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