參數(shù)資料
型號： ISP1561BM
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： ISP1561BM
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝： 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-128
文件頁數(shù)： 72/102頁
文件大?。?/td> 2875K
代理商： ISP1561BM
Philips Semiconductors
ISP1561
USB PCI host controller
Product data
Rev. 01 — 06 February 2003
72 of 102
9397 750 10015
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Table 100: HCCPARAMS register: bit allocation
Bit
31
Symbol
Reset
0
Access
-
Bit
23
Symbol
Reset
0
Access
-
Bit
15
Symbol
Reset
0
Access
-
Bit
7
Symbol
Reset
0
Access
R
30
29
28
27
26
25
24
reserved
0
-
0
-
0
-
0
-
0
-
0
-
0
-
22
21
20
19
18
17
16
reserved
0
-
0
-
0
-
0
-
0
-
0
-
9
0
-
8
14
13
12
11
10
reserved
0
-
6
0
-
5
0
-
4
0
-
3
0
-
2
0
-
1
0
-
0
IST[3:0]
reserved
PFLF
1
R
64AC
0
R
0
R
0
R
1
R
0
-
0
-
Table 101: HCCPARAMS register: bit description
Bit
Symbol
31 to 8
-
7 to 4
IST[3:0]
Description
reserved
Isochronous Scheduling Threshold
: Default = implementation
dependent. This field indicates, relative to the current position of
the executing Host Controller, where software can reliably
update the isochronous schedule. When (IST[3]) is logic 0, then
the value of the least significant 3 bits indicates the number of
microframes a Host Controller can hold a set of isochronous
data structures (one or more) before flushing the state. When
IST[3] is logic 1, then host software assumes the Host Controller
may cache an isochronous data structure for an entire frame.
reserved
Programmable Frame List Flag
: Default = implementation
dependent. If this bit is cleared, the system software must use a
frame list length of 1024 elements with this Host Controller. The
USBCMD register FLS (Frame List Size) field is a read-only
register and should be cleared. If PFLF is set, the system
software can specify and use a smaller frame list and configure
the host via the USBCMD register FLS field. The frame list must
always be aligned on a 4 K page boundary to ensure that the
frame list is always physically contiguous.
64-bit Addressing Capability
: This field documents the
addressing range capability.
3 to 2
1
-
PFLF
0
64AC
0 —
data structures using 32-bit address memory pointers
1 —
data structures using 64-bit address memory pointers
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ISP1561BM,551 功能描述:USB 接口集成電路 USB 2.0 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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ISP1561BMGE 功能描述:IC USB PCI HOST CTRLR 128-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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