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參數(shù)資料
| 型號： | INTEL486 GX |
| 廠商： | Intel Corp. |
| 英文描述： | Emedded Ultra-Low Power INTEL486 GX Processor(嵌入式超低能量處理器) |
| 中文描述： | Emedded超低功耗英特爾486 GX處理器（嵌入式超低能量處理器） |
| 文件頁數(shù)： | 6/48頁 |
| 文件大?。?/td> | 409K |
| 代理商： | INTEL486 GX |
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Embedded Ultra-Low Power Intel486 GX Processor
2
Intel System Management Mode (SMM)
— A
unique Intel architecture operating mode provides
a dedicated special purpose interrupt and address
space that can be used to implement intelligent
power management and other enhanced functions
in a manner that is completely transparent to the
operating system and applications software.
I/O Restart
— An I/O instruction interrupted by a
System Management Interrupt (SMI#) can
automatically be restarted following the execution
of the RSM instruction.
Stop Clock
— The embedded ULP Intel486 GX
processor has a stop clock control mechanism that
provides two low-power states: a Stop Grant state
(40–85 mW typical, depending on input clock
frequency) and a Stop Clock state (~60 μW typical,
with input clock frequency of 0 MHz).
Auto HALT Power Down —
After the execution of
a HALT instruction, the embedded ULP Intel486
GX processor issues a normal Halt bus cycle and
the clock input to the processor core is automati-
cally stopped, causing the processor to enter the
Auto HALT Power Down state (40–85 mW typical,
depending on input clock frequency).
The embedded ULP Intel486 GX processor differs
from the Intel486 SX processor in the following
areas:
16-Bit External Data Bus —
The embedded ULP
Intel486 GX processor is designed for 16-bit
embedded systems, yet internally provides the 32-
bit architecture of the Intel486 processor family.
Two data parity bits are provided.
Processor Upgrade Removed —
The UP# signal
is not provided.
Dynamic Bus-Sizing Removed —
The BS8#
signal is not provided.
Separate Processor-Core Power
— While the
embedded ULP Intel486 GX processor requires a
supply voltage of 3.3 V, the processor core has
dedicated V
pins and operates with a supply
voltage as low as 2.0 V.
Small, Low-Profile Package
— The 176-Lead
Thin Quad Flat Pack (TQFP) package is approxi-
mately 26 mm square and only 1.5 mm in height.
This is approximately the diameter and thickness
of a U.S. quarter. The embedded ULP Intel486 GX
processor is ideal for embedded hand-held and
battery-powered applications.
Level Keeper Circuits
— The embedded ULP
Intel486 GX processor has level-keeper circuits for
its 16-bit external data bus and parity signals. They
retain valid high and low logic voltage levels when
the processor is in the Stop Grant and Stop Clock
states. The level-keeper circuits for the parity
signals are always enabled. This is a power-saving
improvement from the floating data bus of the
Intel486 SX processor.
Auto Clock Freeze
— The embedded ULP
Intel486 GX processor monitors bus events and
internal activity. The Auto Clock Freeze feature
automatically controls internal clock distribution,
turning off clocks to internal units when they are
idle. This power-saving function is transparent to
the embedded system.
Fast Clock Restart
— The embedded ULP
Intel486 GX processor requires only eight clock
periods to synchronize its internal clock with the
CLK input signal. This provides for faster transition
from the Stop Clock State to the Normal State. For
33-MHz operation, this synchronization time is
only 240 ns compared with 1 ms (PLL startup
latency) for the Intel486 processor.
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