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參數(shù)資料
| 型號(hào)： | iMC010FLSA |
| 廠商： | Intel Corp. |
| 英文描述： | 5 Volt Series 2 Flash Memory Card(5V系列2閃速存儲(chǔ)器卡) |
| 中文描述： | 5伏2系列閃存卡（5V的系列2閃速存儲(chǔ)器卡） |
| 文件頁數(shù)： | 14/51頁 |
| 文件大?。?/td> | 827K |
| 代理商： | IMC010FLSA |
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iMC002/004/010/020FLSA
E
14
PRELIMINARY
11.0
COMMON MEMORY ARRAY
Figure 4 shows the Common Memory Plane’s
organization. The first block pair (64 KWords) of
Common Memory, referred to as the Common
Memory
Card
Information
optionally
extends the hardwired CIS in the Attribute
Memory Plane for additional card information. This
may be written during initial card formatting for
OEM customization. Since this CIS Block is part of
Common Memory, its data can be altered. Write
access to the Common Memory CIS Block is
controlled by the write protect control register which
may be activated by system software after power-
up. Additionally, the entire Common Memory Plane
(minus the Common Memory CIS Block) may be
software write protected.
Structure
Block,
NOTE:
The Common Memory CIS Block is not part
of the Attribute Memory Plane. Do not assert
REG# to access the Common Memory CIS
Block.
Device Pair 9
Device Pair 8
Device Pair 7
Device Pair 6
Device Pair 5
Device Pair 4
Device Pair 3
Device Pair 2
Device Pair 1
Device Pair 0
Optional CIS
0000000H
0020000H
0200000H
0400000H
0600000H
0800000H
0A00000H
0C00000H
0E00000H
1000000H
1200000H
13FFFFFH
FIG4
Figure 4. Common Memory Plane
Use the Optional Common Memory Plane CIS
for Custom Card Format Information
12.0
HARDWIRED CIS
The card’s structure description resides in the even-
byte locations starting at 0000H and going to the
CIS ending tuple (FNULL) within the Attribute
Memory Plane. Data included in the hardwired CIS
consists of tuples. Tuples are a variable-length list
of data blocks describing details such as
manufacturer’s name, the size of each memory
device and the number of flash devices within the
card.
13.0
COMPONENT MANAGEMENT
REGISTERS (CMRs)
The CMRs in the Attribute Memory Plane provide
special, software-controlled functionality. Card Control
Logic includes circuitry to access the CMRs. REG
(PCMCIA, pin 61) selects the Attribute Memory Plane
(and therefore the CMRs) when equal to V
IL
.
CMRs are classified into two categories: those
defined by PCMCIA R2.1 and those included by
Intel (referred to as performance enhancement
registers) to enhance the interface between the
host system and the card’s flash memory array.
CMRs (See Figure 3) provide seven control
functions—ready-busy
interrupt
ready-busy status, device ready-busy mask, reset-
powerdown
control,
software-controlled
protection, card status and soft reset.
mode,
device
write
13.1
Soft Reset Register (PCMCIA)
(Configuration Option)
The soft reset register (Attribute Memory Plane
Address 4000H, Figure 5) is defined in the PCMCIA
Release 2.0 specification as the configuration
option register.
Bit 7 is the soft reset bit (SRESET). Writing a 1 to
this bit initiates card reset to the power-on default
state. This bit must be cleared to use the CMRs or
to access the devices.
SRESET implements in software what the reset pin
implements in hardware. On power-up, the card
automatically assumes default conditions. Similar to
the reset pin (pin 58), this bit clears at the end of a
power-on reset cycle or a system reset cycle.
Bits 0 through 6 are not used by this memory card,
but power up as zeroes for PCMCIA compatibility.
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