參數(shù)資料
型號(hào)： IDT88P8344
廠商： Integrated Device Technology, Inc.
英文描述： SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0
中文描述： SPI交換4 ×的SPI - 3至SPI - 4期1.0
文件頁(yè)數(shù)： 56/98頁(yè)
文件大小： 601K
代理商： IDT88P8344
56
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIAL TEMPERATURE RANGE
APRIL 10, 2006
9.3 Indirect registers for SPI-3A, SPI-3B, SPI-
3C, SPI-3D modules
Module A is at Module_base 0x0000
Module B is at Module_base 0x2000
Module C is at Module_base 0x4000
Module D is at Module_base 0x6000
TABLE 48 - MODULE A/B/C/D INDIRECT REGISTER
Table Number, Page
49, page 57
50, page 57
51, page 58
52, page 58
53, page 58
54, page 58
55, page 59
56, page 59
57, page 59
58, page 60
59, page 60
60, page 61
61, page 61
62, page 62
63, page 62
64, page 62
65, page 62
66, page 63
67, page 63
68, page 63
69, page 63
70, page 63
71, page 63
72, page 64
73, page 64
74, page 64
75, page 64
76, page 65
77, page 65
78, page 65
79, page 66
80, page 66
81, page 66
82, page 66
83, page 67
84, page 67
Block_base, Register_offset
0x0000, 0x00-0xFF
0x0200, 0x00
0x0200, 0x01
0x0200, 0x02
0x0200, 0x03
0x0500, 0x00-0x3F
0x0700, 0x00
0x0700, 0x01
0x0700, 0x02
0x0700, 0x03
0x0700, 0x04
0x0A00, 0x00-0x17F
0x0C00, 0x00-0x0B
0x0C00, 0x0C
0x0C00, 0x0D
0x0C00, 0x0E
0x0C00, 0x0F
0x0C00, 0x10-0x15
0x0C00, 0x16-0x17
0x0C00, 0x18-0x19
0x0C00, 0x1A-0x1B
0x0C00, 0x1C-0x1D
0x0C00, 0x1E
0x1000, 0x00-0x3F
0x1100, 0x00-0x3F
———————-
0x1200, 0x00-0x3F
0x1300, 0x00
———————-
0x1300, 0x01
0x1600, 0x00-0x3F
0x1700, 0x00-0x3F
———————-
0x1800, 0x00-0x3F
0x1900, 0x00
———————-
Title of Register
SPI-3 ingress LP to LID map
SPI-3 general configuration register
SPI-3 ingress configuration register
SPI-3 ingress fill level register
SPI-3 ingress max fill level register
SPI-3 egress LID to LP map
SPI-3 egress configuration register
SPI-4 ingress to SPI-4 egress flow control register
SPI-3 egress test register
SPI-3 egress fill level register
SPI-3 egress max fill level register
LID associated event counters
Non LID associated event counters
Non LID associated interrupt indication register
Non LID associated interrupt enable register
LID associated interrupt indication register
LID associated interrupt enable register
Non critical LID associated capture table
SPI-3 to SPI-4 critical LID interrupt indication registers
SPI-3 to SPI-4 critical LID interrupt enable registers
SPI-4 to SPI-3 critical LID interrupt indication registers
SPI-4 to SPI-3 critical LID interrupt enable registers
Critical events source indication register
SPI-3 ingress packet length configuration register
SPI-4 egress port descriptor table
SPI-4 egress direction code assignment
SPI-3 ingress port descriptor table
SPI-3 to SPI-4 PFP register
NR_LID field encoding
SPI-3 to SPI-4 flow control register
SPI-4 ingress packet length register
SPI-3 egress port descriptor table
SPI-3 egress direction code assignment
SPI-4 ingress port descriptor table
SPI-4 to SPI-3 PFP register
NR_LID field encoding
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