參數(shù)資料
型號(hào)： IDT88P8344
廠商： Integrated Device Technology, Inc.
英文描述： SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0
中文描述： SPI交換4 ×的SPI - 3至SPI - 4期1.0
文件頁(yè)數(shù)： 47/98頁(yè)
文件大小： 601K
代理商： IDT88P8344
47
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIAL TEMPERATURE RANGE
APRIL 10, 2006
Indirect High Address (register 0x35)
bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
Indirect Low Address (register 0x34)
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 2 bit 0
TABLE 20 - BIT ORDER WITHIN A 16-BIT ADDRESS REGISTER
Bit 15 is the most significant data bit.
Indirect Control (register 0x3F)
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 2 bit 0
TABLE 21 - BIT ORDER WITHIN
AN 8-BIT CONTROL REGISTER
Bit 7 is the most significant data bit.
Module base address (Module_base)
There are five modules defined for indirect data access.
TABLE 22 - MODULE BASE ADDRESS (MODULE_BASE)
MODULE
Module_base
0x0000
0x2000
0x4000
0x6000
0x8000
Module A (SPI3-A, PFP-A, PMON-A)
Module B (SPI3-B, PFP-B, PMON-B)
Module C (SPI3-C, PFP-C, PMON-C)
Module D (SPI3-D, PFP-D, PMON-D)
Common (SPI-4, timng, PMON, clock, GPIO, and version number)
Block base
There are block bases defined for SPI-3 modules and also for Common, as
shown in the following tables.
TABLE 23 - INDIRECT ACCESS BLOCK BASES FOR
MODULE A, MODULE B, MODULE C, AND MODULE D
Block_base
0x0000
0x0200
0x0500
0x0700
0x0A00
0x0C00
0x1000
0x1100
0x1200
0x1300
0x1600
0x1700
0x1800
0x1900
Function
SPI-3 ingress LP to LID registers
SPI-3 ingress general configuration register
SPI-3 egress LID to LP registers
SPI-3 egress configuration registers
LID associated event counters
Non LID associated event counters
SPI-3 ingress packet length configuration register
SPI-4 egress port descriptor table
SPI-3 ingress port descriptor tables
SPI-3 to SPI-4 PFP and flow control registers
SPI-4 ingress control registers
SPI-3 egress port descriptor table
SPI-4 ingress port descriptor table
SPI-4 to SPI-3 PFP register
相關(guān)PDF資料
PDF描述
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