參數(shù)資料
型號: IDT88P8342BHI
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 2/98頁
文件大小: 0K
描述: IC SPI3-SPI4 EXCHANGE 820-PBGA
標準包裝: 24
系列: *
其它名稱: 88P8342BHI
10
IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
Generic Name
Specific Name
I/O type
Description
Mode
Link
PHY
E_FCLK
SPI3A_E_FCLK
I-ST
Egress SPI-3 write clock
TFCLK
RFCLK
SPI3B_E_FCLK
LVTTL
E_ENB
SPI3A_E_ENB
B-PU
Egress read enable
TENB (O)
RENB (I)
SPI3B_E_ENB
LVTTL
E_DAT[31:0]
SPI3A_E_DAT[31:0]
O-Z
Egress data bus
TDAT [31:0]
RDAT [31:0]
SPI3B_E_DAT[31:0]
LVTTL
E_MOD[1:0]
SPI3A_E_MOD[1:0]
O-Z
Egress word modulus
TMOD [1:0]
RMOD [1:0]
SPI3B_E_MOD[1:0]
LVTTL
E_PRTY
SPI3A_E_PRTY
O-Z
Egress parity
TPRTY
RPRTY
SPI3B_E_PRTY
LVTTL
E_SOP
SPI3A_E_SOP
O-Z
Egress start of packet
TSOP
RSOP
SPI3B_E_SOP
LVTTL
E_EOP
SPI3A_E_EOP
O-Z
Egress end of packet
TEOP
REOP
SPI3B_E_EOP
LVTTL
E_ERR
SPI3A_E_ERR
O-Z
Egress EOP error
TERR
RERR
SPI3B_E_ERR
LVTTL
E_SX
SPI3A_E_SX
O-Z
Egress start of transfer
TSX
RSX
SPI3B_E_SX
LVTTL
TABLE 3 – SPI-3 EGRESS INTERFACE PIN DEFINITION
Generic Name
Specific Name
I/O type
Description
Mode
Link
PHY
DTPA[3:0]
SPI3A_DTPA[3:0]
B-PU
Direct transmit packet available
DTPA (I) DTPA (O)
SPI3B_DTPA[3:0]
LVTTL
STPA
SPI3A_STPA
B-PU
Selected-PHY transmit packet available
STPA (I) STPA (O)
SPI3B_STPA
LVTTL
PTPA
SPI3A_PTPA
B-PU
Polled-PHY transmit packet available
PTPA (I) PTPA (O)
SPI3B_PTPA
LVTTL
ADR[7:0]
SPI3A_ADR[7:0]
B-PU
Polled transmit PHY address
ADR (O)
ADR (I)
SPI3B_ADR[7:0]
LVTTL
TABLE 4 – SPI-3 STATUS INTERFACE PIN DEFINITION
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