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| 型號(hào)： | IDT82P5088BBG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 60/81頁(yè) |
| 文件大小： | 0K |
| 描述： | IC LIU T1/E1/J1 OCTAL 256PBGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 功能： | 線(xiàn)路接口單元（LIU） |
| 接口： | E1，J1，T1 |
| 電路數(shù)： | 8 |
| 電源電壓： | 1.8V, 3.3V |
| 功率（瓦特）： | 2.57W |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 256-BGA |
| 供應(yīng)商設(shè)備封裝： | 256-PBGA（17x17） |
| 包裝： | 托盤(pán) |
| 包括： | 集成式時(shí)鐘適配器 |
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IDT82P5088
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
IEEE STD 1149.1 JTAG TEST ACCESS PORT
63
February 5, 2009
Figure-24 JTAG State Diagram
Exit1-IR
This is a temporary state. While in this state, if TMS is held high, a rising edge applied to TCK causes the controller to enter the Update-IR
state, which terminates the scanning process. If TMS is held low and a rising edge is applied to TCK, the controller enters the Pause-IR
state. The test data register selected by the current instruction retains its previous value and the instruction does not change during this
state.
Pause-IR
The pause state allows the test controller to temporarily halt the shifting of data through the instruction register. The test data register
selected by the current instruction retains its previous value and the instruction does not change during this state. The controller remains in
this state as long as TMS is low. When TMS goes high and a rising edge is applied to TCK, the controller moves to the Exit2-IR state.
Exit2-IR
This is a temporary state. While in this state, if TMS is held high, a rising edge applied to TCK causes the controller to enter the Update-IR
state, which terminates the scanning process. If TMS is held low and a rising edge is applied to TCK, the controller enters the Shift-IR state.
The test data register selected by the current instruction retains its previous value and the instruction does not change during this state.
Update-IR
The instruction shifted into the instruction register is latched into the parallel output from the shift-register path on the falling edge of TCK.
When the new instruction has been latched, it becomes the current instruction. The test data registers selected by the current instruction
retain their previous value.
Table-70 TAP Controller State Description (Continued)
STATE
DESCRIPTION
Test-logic Reset
Run Test/Idle
Select-DR
Select-IR
Capture-DR
Capture-IR
Shift-DR
Shift-IR
Exit1-DR
Exit1-IR
Pause-DR
Pause-IR
Exit2-DR
Exit2-IR
Update-DR
Update-IR
1
0
1
00
0
1
0
1
0
1
0
1
0
1
0
1
0
1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT82P5088BBG8 | 制造商:Integrated Device Technology Inc 功能描述:IC LIU T1/E1/J1 OCTAL 256PBGA |
| IDT82V1054A | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE |
| IDT82V1054APF | 功能描述:IC PCM CODEC 4CH MPI 3.3V 64TQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| IDT82V1054APF8 | 功能描述:IC PCM CODEC 4CH MPI 3.3V 64TQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| IDT82V1054APFG | 功能描述:IC PCM CODEC 4CH MPI 3.3V 64TQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
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