參數(shù)資料
型號(hào)： IDT82P5088BBG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 38/81頁
文件大?。?/td> 0K
描述： IC LIU T1/E1/J1 OCTAL 256PBGA
標(biāo)準(zhǔn)包裝： 90
功能： 線路接口單元（LIU）
接口： E1，J1，T1
電路數(shù)： 8
電源電壓： 1.8V, 3.3V
功率（瓦特）： 2.57W
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 256-BGA
供應(yīng)商設(shè)備封裝： 256-PBGA（17x17）
包裝： 托盤
包括： 集成式時(shí)鐘適配器
IDT82P5088
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
PROGRAMMING INFORMATION
43
February 5, 2009
LEVEL0
2
-
When GPIO0 is defined as an output port, this bit determines the output level on GPIO0 pin.
= 0: low level output on port GPIO0
= 1: high level output on port GPIO0
When GPIO0 is defined as an input port, this bit reflects the input level on GPIO0 pin
= 0: low level input on port GPIO0
= 1: high level input on port GPIO0
DIR1
1
= 0: port GPIO1 is configured as output port
= 1: port GPIO1 is configured as input port
DIR0
0
1
= 0: port GPIO0 is configured as output port
= 1: port GPIO0 is configured as input port
Table-33 REFOUT: Reference clock output select Register
(R/W, Address = 07H)
Symbol
Bit
Default
Description
-
7-6
00
Reserved
RO2[2:0]
5-3
000
= 000: RCLK1 internally loop to REFA output pin
= 001: RCLK2 internally loop to REFA output pin
= 010: RCLK3 internally loop to REFA output pin
= 011: RCLK4 internally loop to REFA output pin
= 000: RCLK5 internally loop to REFA output pin
= 101: RCLK6 internally loop to REFA output pin
= 110: RCLK7 internally loop to REFA output pin
= 111: RCLK8 internally loop to REFA output pin
RO1[2:0]
2-0
000
= 000: RCLK1 internally loop to REFB output pin
= 001: RCLK2 internally loop to REFB output pin
= 010: RCLK3 internally loop to REFB output pin
= 011: RCLK4 internally loop to REFB output pin
= 100: RCLK5 internally loop to REFB output pin
= 101: RCLK6 internally loop to REFB output pin
= 110: RCLK7 internally loop to REFB output pin
= 111: RCLK8 internally loop to REFB output pin
Table-34 INTCH: Interrupt Channel Indication Register
(R, Address = 09H)
Symbol
Bit
Default
Description
INT_CH[7:0]
7-0
00H
INT_CH[n]=1 indicates that an interrupt was generated by channel [n+1] respectively.
Table-35 TIMER INTE: Timer Interrupt Enable Register
(R, Address = 0CH)
Symbol
Bit
Default
Description
-
7-1
000000
Reserved.
TMOVIE
0
= 0: mask interrupt
= 1: enable timer over interrupt
Table-32 GPIO: General Purpose IO Pin Definition Register (Continued)
(R/W, Address = 06H)
Symbol
Bit
Default
Description
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參數(shù)描述
IDT82P5088BBG8 制造商:Integrated Device Technology Inc 功能描述:IC LIU T1/E1/J1 OCTAL 256PBGA
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