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參數(shù)資料
| 型號(hào)： | IDT82P5088BBG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 29/81頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU T1/E1/J1 OCTAL 256PBGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 功能： | 線路接口單元（LIU） |
| 接口： | E1，J1，T1 |
| 電路數(shù)： | 8 |
| 電源電壓： | 1.8V, 3.3V |
| 功率（瓦特）： | 2.57W |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-BGA |
| 供應(yīng)商設(shè)備封裝： | 256-PBGA（17x17） |
| 包裝： | 托盤 |
| 包括： | 集成式時(shí)鐘適配器 |
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IDT82P5088
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
FUNCTIONAL DESCRIPTION
35
February 5, 2009
Manual Report Mode
In Manual Report Mode, the internal Error Counter starts to count the
received errors when the CNT_MD bit (MAINT6, 31H...) is set to ‘0’. When
there is a ‘0’ to ‘1’ transition on the CNT_STOP bit (MAINT6, 31H...), the
data in the counter will be transferred to (CNTL, 3CH...) and (CNTH,
3DH...), then the counter will be reset. The errors occurred during the trans-
fer will be accumulated to the next round. If the counter overflows, a counter
overflow interrupt indicated by CNTOV_IS bit (INTS1, 3BH...) will be gen-
erated if it is not masked by CNT_IE bit (INTENC1, 34H...).
Figure-18 Manual Report Mode
Note: 1. It is recommended that users should do the followings within next round
of error counting: Read the data in CNTL and CNTH; Reset CNT_TRF
bit for the next ‘0’ to ‘1’ transition on this bit.
3.6.3
BIPOLAR VIOLATION AND PRBS ERROR INSERTION
Only when three consecutive ‘1’s are detected in the transmit data
stream, will a ‘0’ to ‘1’ transition on the BPV_INS bit (MAINT6, 31H...) gen-
erate a bipolar violation pulse, and the polarity of the second ‘1’ in the series
will be inverted.
A ‘0’ to ‘1’ transition on the EER_INS bit (MAINT6, 31H...) will generate
a logic error during the PRBS/QRSS transmission.
3.7
LINE DRIVER FAILURE MONITORING
The transmit driver failure monitor can be enabled or disabled by setting
DFM_OFF bit (TCF1, 23H...). If the transmit driver failure monitor is
enabled, the transmit driver failure will be captured by DF_S bit (STAT0,
36H...). The transition of the DF_S bit is reflected by DF_IS bit (INTS0,
3AH...), and, if enabled by DF_IE bit (INTENC0, 33H...), will generate an
interrupt.WhenthereisashortcircuitontheTTIPn/TRINGnport,theoutput
current will be limited to 100 mA (typical) and an interrupt will be generated.
A '0' to '1' transition
on CNT_STOP?
counting
Manual Report mode
(CNT_MD=0)
CNTL, CNTH
data in
counter
0
Y
N
next round
repeat the
same process
Read the data in CNTL,
CNTH within next round1
Reset CNT_STOP for the
next '0' to '1' transition
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相關(guān)代理商/技術(shù)參數(shù) |
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| IDT82P5088BBG8 | 制造商:Integrated Device Technology Inc 功能描述:IC LIU T1/E1/J1 OCTAL 256PBGA |
| IDT82V1054A | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE |
| IDT82V1054APF | 功能描述:IC PCM CODEC 4CH MPI 3.3V 64TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| IDT82V1054APF8 | 功能描述:IC PCM CODEC 4CH MPI 3.3V 64TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| IDT82V1054APFG | 功能描述:IC PCM CODEC 4CH MPI 3.3V 64TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
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