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參數(shù)資料
| 型號： | IDT821034 |
| 廠商： | Integrated Device Technology, Inc. |
| 元件分類： | Codec |
| 英文描述： | QUAD PCM CODEC WITH PROGRAMMABLE GAIN |
| 中文描述： | 四的PCM編解碼器，具有可編程增益 |
| 文件頁數(shù)： | 5/52頁 |
| 文件大?。?/td> | 609K |
| 代理商： | IDT821034 |
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5
INDUSTRIAL TEMPERATURE RANGES
IDT82V2058 OCTAL E1 SHORT HAUL LINE INTERFACE UNIT
Pin No.
Name
Type
QFP144
37
30
80
73
108
101
8
1
38
31
79
72
109
102
7
144
BGA160
N2
L2
L13
N13
B13
D13
D2
B2
N3
L3
L12
N12
B12
D12
D3
B3
Description
TDn: Transmit Data for Channel 0~7
When the device is in Single Rail mode, the NRZ data to be transmitted is input on this pin. Data
on TDn is sampled into the device on falling edges of TCLKn, and encoded by AMI or HDB3 line
code rules before being transmitted to the line.
BPVIn: Bipolar Violation Insertion for Channel 0~7
Bipolar violation insertion is available in Signal Rail mode 2 (see
table-1
) with AMI enabled. A low-
to-high transition on this pin will make the next logic one to be transmitted on TDn pin the same
polarity as the previous pulse, and violate the AMI rule. This is for testing.
TDPn/TDNn: Positive/Negative Transmit Data for Channel 0~7
When the device is in Dual Rail mode, the NRZ data to be transmitted for positive/negative pulse
is input on this pin. Data on TDPn/TDNn are active high and sampled into the device on falling
edges of TCLKn. The line code in Dual Rail mode is as the follows :
TDPn
TDNn
Output Pulse
0
0
Space
0
1
Negative Pulse
1
0
Positive Pulse
1
1
Space
Pulling pin TDNn high for more than 16 consecutive TCLK clock cycles will configure the
corresponding channel into Single Rail mode 1 (see
table-1 on Page13
).
TCLKn: Transmit Clock for Channel 0~7
The clock of 2.048 MHz to be transmitted is input on this pin. The transmit data at TDn/TDPn or
TDNn is sampled into the device on falling edges of TCLKn.
Pulling TCLKn high for more than 16 MCLK cycles, the corresponding transmitter is set in
Transmit All One (TAO) state (when MCLK is clocked). In TAO state, the TAO generator adopts
MCLK as the time reference.
If TCLKn is Low, the corresponding transmit channel is set into power down state, while driver
output ports become high impedance.
The different operating modes of TCLKn are summarized as follows:
MCLK
TCLKn
Transmitter Mode
Clocked
Clocked
Normal operation
Clocked
High (
≥
16 MCLK) Transmit All One (TAO) signals to line side in the
corresponding transmit channel.
Clocked
Low (
≥
64 MCLK) Corresponding transmit channel is set into power down state.
TCLKn is clocked Normal operation
TCLKn is high
(
≥
16 TCLK1)
TCLKn is low
(
≥
64 TCLK1)
The receive path is not affected by the status of TCLK1.
When MCLK is high, all receive paths just slice the incoming
data stream. When MCLK is low, all the receive paths are
powered down.
High/Low
TCLK1 is not
available
(High/Low)
TD0/TDP0
TD1/TDP1
TD2/TDP2
TD3/TDP3
TD4/TDP4
TD5/TDP5
TD6/TDP6
TD7/TDP7
BPVI0/TDN0
BPVI1/TDN1
BPVI2/TDN2
BPVI3/TDN3
BPVI4/TDN4
BPVI5/TDN5
BPVI6/TDN6
BPVI7/TDN7
I
Transmit All One (TAO) signals to the line
side in the corresponding transmit channel.
Corresponding transmit channel is set into
power down state.
High/Low
TCLK1 is clocked
TCLK0
TCLK1
TCLK2
TCLK3
TCLK4
TCLK5
TCLK6
TCLK7
I
36
29
81
74
107
100
9
2
N1
L1
L14
N14
B14
D14
D1
B1
All eight transmitters (TTIPn & TRINGn) will be in high
impedance state.
PIN DESCRIPTION (CONTINUED)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT821034DN | 功能描述:IC PCM CODEC QUAD MPI 52-PQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| IDT821034DNG | 功能描述:IC PCM CODEC QUAD MPI 52-PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| IDT821054 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE |
| IDT821054A | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE |
| IDT821054APF | 功能描述:IC PCM CODEC QUAD MPI 64-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
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