參數(shù)資料
型號(hào)： IBM25CPC710AB3A100
廠商： IBM Microeletronics
英文描述： IBM Dual Bridge and Memory Controller(IBM雙橋和存儲(chǔ)器控制器（連接帶同步動(dòng)態(tài)RAM存儲(chǔ)器的Power PC 60x總線和兩個(gè)PCI端口）)
中文描述： IBM的雙橋和內(nèi)存控制器（IBM的雙橋和存儲(chǔ)器控制器（連接帶同步動(dòng)態(tài)RAM的存儲(chǔ)器的Power PC處理器60倍的PCI總線和兩個(gè)端口））
文件頁(yè)數(shù)： 28/224頁(yè)
文件大?。?/td> 3278K
代理商： IBM25CPC710AB3A100
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)當(dāng)前第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)
IBM25CPC710AB3A100
IBM Dual Bridge and Memory Controller
Page 16 of 208
dbamc01_ch2.fm.01
July 13, 2000
2.1 Signal Descriptions
Tri-state driver/receivers interface 3.3 V internal functions with 3.3 V LVTTL off-chip buses. Some receivers
interface 3.3 V internal functions with either 3.3 V LVTTL or 5.0 V TTL off-chip bidirectional buses. All drivers
are 50 ohm, source-terminated. In the following table, "Pull-up" in the Type column indicates an internal pull-
up is built into the device driver/receiver. No additional external device is required.
Table 3: 60x Bus Interface Signals
(Page 1 of 3)
Signal Name
I/O
Type
Description
Address Bus Arbitration Signals
SYS_BR0
SYS_BR1
SYS_BR2
SYS_BR3
SYS_BG0
SYS_BG1
Address Transfer Start Signals
I
5.0V-tolerant
pull-up
Bus Request.
Indicates the device on the 60x bus associated with this signal is
requesting ownership of the address bus.
Note: SYS_BR2 and SYS_BR3 are reserved for future use. They should be tied
to up level (=1).
O
Bus Grant.
Indicates the master associated with this signal may, with proper
qualification, assume mastership of the address bus.
SYS_TS
I/O
Transfer Start.
Output:
Indicates device has started an address tenure and the
address bus and transfer attribute signals are valid. Only
“
address only
operations
”
and
“
snoop operation with programmable TT code
”
are per-
formed.
Input:
Indicates a master on the 60x has started an address tenure and
the address bus and transfer attribute signals are valid. For address
tenures that require a data transfer, this signal also indicates a request
for the data bus.
Address Bus Signals
SYS_ADDR[0:31]
I/O
Pull-up
Address Bus.
Output:
Represents the physical address of a cache operation that
should be snooped by devices on the 60x bus. A[0] is the most signifi-
cant address bit.
Input
: Represents the physical address for the current transaction
(except for the XferData transaction types).
Address Parity.
Output:
Represents one bit of odd parity for each of the four bytes of
the address bus. Odd parity means that an odd number of bits, includ-
ing the parity bit, are driven high. The signal assignments correspond to
the following:
AP[0] - A[0:7] AP[1] - A[8:15]
AP[2] - A[16:23] AP[3] - A[24:31]
Input:
Represents one bit of odd parity for each of the four bytes of the
address bus. A checkstop is generated if bad parity is detected and bit
8 is
‘
1
’
in the error control register.
Configuration.
Indicate the current address tenure is a configuration cycle to
the device associated with this signal. The associated device must respond (if
present) to addresses in the range
‘
FF20 0000
’
through
‘
FF20 1FFF.
’
Other
addresses are responded to as normal.
SYS_ADDRP[0:3]
I/O
Pull-up
SYS_CONFIG0
SYS_CONFIG1
O
Transfer Attribute Signals
SYS_TT[0:4]
I/O
Pull-up
Transfer Type.
Output:
Indicates the type of transfer in progress. The values are pro-
grammable according to the PowerPC type and stored in the ATAS
register.
Input
: Indicates the type of transfer in progress.
相關(guān)PDF資料
PDF描述
IBM3206K0424 IBM Processor for Network Resources(異步轉(zhuǎn)換模式（ATM）32位微處理器（用于網(wǎng)絡(luò)資源管理）)
IBM3209K3114 IBM Packet Routing Switch Serial Interface Converter(IBM封裝路線選擇開(kāi)關(guān)串行接口轉(zhuǎn)換器)
IBM32NPCXX1EPABBE66 IBM Processor for Network Resources(異步轉(zhuǎn)換模式（ATM）32位微處理器（用于網(wǎng)絡(luò)資源管理）)
IBM39MPEGCS24DPFA16C High Performance Audio/Video Decoder(高性能音頻/視頻譯碼器)
IBM39MPEGCS24PFA16C High Performance Audio/Video Decoder(高性能音頻/視頻譯碼器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IBM25CPC710BB3B100 制造商:IBM 功能描述:
IBM25CPC710CF3B133 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:PERIPHERAL (MULTIFUNCTION) CONTROLLER
IBM25EB750CLWINHCK00 制造商:IBM Microelectronics 功能描述:750CL REF DES KIT - HW & SW - Boxed Product (Development Kits) 制造商:IBM 功能描述:IBM IBM25EB750CLWINHCK00 Development Kits
IBM25EB750GXWINHIC00 制造商:IBM 功能描述:750GX REF DESIGN KIT, HDW & SOFTWARE - Boxed Product (Development Kits)
IBM25EMPPC740DBUB2330 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*