
IBM041813PQKB
64K X 18 BURST PIPELINE SRAM
Preliminary
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 6 of 15
50H5206
SA14-4665-02
Revised 9/97
Recommended DC Operating Conditions
(T
A
=0 to 70
°
C)
Parameter
Symbol
Min.
Typ.
Max.
Units
Notes
Supply Voltage
V
DD
3.135
3.3
3.465
V
1, 4
Input High Voltage
V
IH
2.2
—
5.5
V
1, 2, 4
Input Low Voltage
V
IL
-0.3
—
0.8
V
1, 3, 4
Output Current
I
OUT
—
5
8
mA
4
1. All voltages referenced to V
SS
. All V
DD(Q)
and V
SS(Q)
must be connected.
2. V
IH
(Max)DC = 5.5 V, V
IH
(Max)AC = 6.0 V (pulse width
≤
4.0ns).
3. V
IL
(Min)DC = - 0.3 V, V
IL
(Min)AC= -1.5 V (pulse width
≤
4.0ns).
4. Input voltage levels are tested to the following DC conditions: 1 microsecond cycle and 200 ns set-up and hold times.
Capacitance
(T
A
=0 to +70
°
C, V
DD
=3.3V
±
5%, f=1MHz)
Parameter
Symbol
Test Condition
Max
Units
Notes
Input Capacitance
C
IN
V
IN
= 0V
5
pF
Data I/O Capacitance (DQ0-DQ17)
C
OUT
V
OUT
= 0V
5
pF
DC Electrical Characteristics
(T
A
= 0 to +70
°
C, V
DD
=3.3V
±
5%)
Parameter
Symbol
Min.
Max.
Units
Notes
Operating Current
Average Power Supply Operating Current
(I
OUT
= 0, OE= V
IH
,)
I
DD10
—
375
mA
2, 3
Standby Current
Power Supply Standby Current
(CS2 = V
or CS2 = V
or CS = V
All other inputs = V
IH
or V
IL
, I
OUT.
= 0 Clock @ 100 MHz)
I
SB
—
25
mA
1, 3
Input Leakage Current
Input Leakage Current, any input
(V
IN
= 0 &V
DD
)
I
LI
—
+1
μ
A
4
Output Leakage Current
(V
OUT
=0 &V
DD
, OE = V
IH
)
I
LO
—
+1
μ
A
Output High Level
Output “H” Level Voltage (I
OH
=-8mA @ 2.4V)
V
OH
2.4
—
V
Output Low Level
Output “L” Level Voltage (I
OL
=+8mA @ 0.4V)
V
OL
—
0.4
V
1. I
SB
= Stand-by Current.
2. I
DD
= Selected Current.
3. I
OUT
= Chip Output Current.
4. The input leakage current for 5.5V input is 200
μ
A for Clk, Chip Selects, and Output Enable. Other inputs have 100
μ
A of leakage
current at 5.5V.