參數(shù)資料
型號(hào)： IBM025171
廠商： IBM Microeletronics
英文描述： 4Mb（256K X 16） MULTIPORT VIDEO RAM(4M位（256K X 16）多端口視頻RAM)
中文描述： 4Mb的（256 × 16）多端口視頻內(nèi)存（4分位（256 × 16）多端口視頻內(nèi)存）
文件頁(yè)數(shù)： 13/65頁(yè)
文件大?。?/td> 841K
代理商： IBM025171
IBM025160
IBM025161
IBM025170
IBM025171
256K X 16 MULTIPORT VIDEO RAM
33G0307
SA14-4751-05
Revised 3/98
IBM Corporation, 1995. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 13 of 65
Write Cycle
Symbol
Parameter
-6H
-60
-70
Units
Notes
Min.
Max.
Min.
Max.
Min.
Max.
t
CWL
Write Command setup before CE high
10
—
15
—
17
—
ns
4
t
DH
Data-in hold time after CE or W low, whichever is later
6
—
8
—
8
—
ns
1
t
DHR
Data-in hold time after RE low
20
—
20
—
25
—
ns
t
DSC
Data-in setup before CE low
0
—
0
—
0
—
ns
t
DSW
Data-in setup before W low
0
—
0
—
0
—
ns
t
GHD
TRG high before data-in applied on primary port data pins
10
—
15
—
17
—
ns
t
RWL
Write setup time before RE high
10
—
15
—
17
—
ns
3
t
WCH
Write hold time after CE low
6
—
6
—
8
—
ns
t
WCS
Early write command setup before CE Low
0
—
0
—
0
—
ns
1, 2
t
WP
Write command pulse width
6
—
6
—
8
—
ns
1. Data-in setup and hold is measured from the later of the two timings - CE / UCE / LCE or W / UW / LW.
2. t
RWD
, t
CWD
, t
AWD
and t
CPW
are not restrictive parameters. They are included as electrical characteristics only. If t
WCS
≥
t
WCS
(min)
the cycle is an early write cycle and the data pin will remain open circuit (high impedance) through the entire cycle; if
t
RWD
≥
t
RWD
(min), t
CWD
≥
t
CWD
(min), and t
CPW
≥
t
CPW
(min) (Fast Page) mode, the cycle is a Read-Modify-Write cycle and the
data out will contain data read from the selected cell; if neither of the above sets of conditions are satisfied, the condition of the
data out (at access time) is indeterminate.
3. t
RWL
and t
RP
cannot be at minimum values simultaneously. t
RWL
+ t
RP
≥
60ns (60ns t
RAC
product), t
RWL
+ t
RP
≥
70ns (70ns t
RAC
product).
4. t
CWL
and t
RP
cannot be at minimum values simultaneously. t
CWL
+ t
RP
≥
60ns (60ns t
RAC
product), t
CWL
+ t
RP
≥
70ns (70ns t
RAC
product)
.
Read-Modify-Write Cycle
Symbol
Parameter
-6H
-60
-70
Units
Notes
Min.
Max.
Min.
Max.
Min.
Max.
t
AWD
Column address to W low
50
—
50
—
60
—
ns
1
t
CWD
CE low before W low
35
—
35
—
40
—
ns
1
t
OEH
Output disable (TRG high) hold time from W low
15
—
15
—
17
—
ns
t
RWC
Read-modify-write cycle time
135
—
135
—
155
—
ns
t
RWD
RE low to W low
80
—
80
—
95
—
ns
1
1. t
RWD
, t
CWD
, t
AWD
and t
CPW
are not restrictive parameters. They are included as electrical characteristics only. If t
WCS
≥
t
WCS
(min)
the cycle is an early write cycle and the data pin will remain open circuit (high impedance) through the entire cycle; if
t
RWD
≥
t
RWD
(min), t
CWD
≥
t
CWD
(min), and t
CPW
≥
t
CPW
(min) (Fast Page) mode, the cycle is a Read-Modify-Write cycle and the
data out will contain data read from the selected cell; if neither of the above sets of conditions are satisfied, the condition of the
data out (at access time) is indeterminate.
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